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  <channel>
    <title>topic Unexpected output using FIOSET and FIOCLR in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1699655#M53730</link>
    <description>&lt;P&gt;I have the following code:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;	LPC_GPIO0-&amp;gt;FIODIR |= (1&amp;lt;&amp;lt;2);	// P0.2 is output
	LPC_GPIO0-&amp;gt;FIODIR |= (1&amp;lt;&amp;lt;3);	// P0.3 is output
	LPC_GPIO0-&amp;gt;FIODIR |= (1&amp;lt;&amp;lt;23);	// P0.23 is output
	LPC_GPIO0-&amp;gt;FIODIR |= (1&amp;lt;&amp;lt;24);	// P0.24 is output
	LPC_GPIO0-&amp;gt;FIODIR |= (1&amp;lt;&amp;lt;25);	// P0.25 is output
	LPC_GPIO0-&amp;gt;FIODIR |= (1&amp;lt;&amp;lt;26);	// P0.26 is output

	LPC_GPIO0-&amp;gt;FIOCLR = ((1&amp;lt;&amp;lt;2) | (1&amp;lt;&amp;lt;3) | (1&amp;lt;&amp;lt;24) | (1&amp;lt;&amp;lt;25));	// Set PGC and PGD pins low
	LPC_GPIO0-&amp;gt;FIOSET = ((1&amp;lt;&amp;lt;23) | (1&amp;lt;&amp;lt;26));	// Set MCLR pins high&lt;/LI-CODE&gt;&lt;P&gt;This is the output I get using a logic analyser attached to the port pins&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="perdrix_0-1691230146884.png" style="width: 227px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/235210iB4FC3B161177CD92/image-dimensions/227x417?v=v2" width="227" height="417" role="button" title="perdrix_0-1691230146884.png" alt="perdrix_0-1691230146884.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I never asked for P0.23 and P0.26 to go low so why did they do so?&lt;/P&gt;&lt;P&gt;Puzzled, David&lt;/P&gt;</description>
    <pubDate>Sat, 05 Aug 2023 10:10:57 GMT</pubDate>
    <dc:creator>perdrix</dc:creator>
    <dc:date>2023-08-05T10:10:57Z</dc:date>
    <item>
      <title>Unexpected output using FIOSET and FIOCLR</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1699655#M53730</link>
      <description>&lt;P&gt;I have the following code:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;	LPC_GPIO0-&amp;gt;FIODIR |= (1&amp;lt;&amp;lt;2);	// P0.2 is output
	LPC_GPIO0-&amp;gt;FIODIR |= (1&amp;lt;&amp;lt;3);	// P0.3 is output
	LPC_GPIO0-&amp;gt;FIODIR |= (1&amp;lt;&amp;lt;23);	// P0.23 is output
	LPC_GPIO0-&amp;gt;FIODIR |= (1&amp;lt;&amp;lt;24);	// P0.24 is output
	LPC_GPIO0-&amp;gt;FIODIR |= (1&amp;lt;&amp;lt;25);	// P0.25 is output
	LPC_GPIO0-&amp;gt;FIODIR |= (1&amp;lt;&amp;lt;26);	// P0.26 is output

	LPC_GPIO0-&amp;gt;FIOCLR = ((1&amp;lt;&amp;lt;2) | (1&amp;lt;&amp;lt;3) | (1&amp;lt;&amp;lt;24) | (1&amp;lt;&amp;lt;25));	// Set PGC and PGD pins low
	LPC_GPIO0-&amp;gt;FIOSET = ((1&amp;lt;&amp;lt;23) | (1&amp;lt;&amp;lt;26));	// Set MCLR pins high&lt;/LI-CODE&gt;&lt;P&gt;This is the output I get using a logic analyser attached to the port pins&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="perdrix_0-1691230146884.png" style="width: 227px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/235210iB4FC3B161177CD92/image-dimensions/227x417?v=v2" width="227" height="417" role="button" title="perdrix_0-1691230146884.png" alt="perdrix_0-1691230146884.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I never asked for P0.23 and P0.26 to go low so why did they do so?&lt;/P&gt;&lt;P&gt;Puzzled, David&lt;/P&gt;</description>
      <pubDate>Sat, 05 Aug 2023 10:10:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1699655#M53730</guid>
      <dc:creator>perdrix</dc:creator>
      <dc:date>2023-08-05T10:10:57Z</dc:date>
    </item>
    <item>
      <title>Re: Unexpected output using FIOSET and FIOCLR</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1699717#M53734</link>
      <description>&lt;P&gt;Anyone?&lt;/P&gt;</description>
      <pubDate>Sun, 06 Aug 2023 13:03:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1699717#M53734</guid>
      <dc:creator>perdrix</dc:creator>
      <dc:date>2023-08-06T13:03:10Z</dc:date>
    </item>
    <item>
      <title>Re: Unexpected output using FIOSET and FIOCLR</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1699751#M53738</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Can you tell us the part number you are using?&lt;/P&gt;
&lt;P&gt;BTW, if you write the GPIO output data register directly instead of writing the FIOSET and FIOCLR register, what is the result?&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
      <pubDate>Mon, 07 Aug 2023 01:21:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1699751#M53738</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2023-08-07T01:21:10Z</dc:date>
    </item>
    <item>
      <title>Re: Unexpected output using FIOSET and FIOCLR</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1700007#M53744</link>
      <description>&lt;P&gt;I'm using an LPC1768&lt;/P&gt;&lt;P&gt;&amp;gt;if you write the GPIO output data register directly&lt;/P&gt;&lt;P&gt;Do you mean using FIOPIN?&lt;/P&gt;&lt;P&gt;David&lt;/P&gt;</description>
      <pubDate>Mon, 07 Aug 2023 08:02:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1700007#M53744</guid>
      <dc:creator>perdrix</dc:creator>
      <dc:date>2023-08-07T08:02:25Z</dc:date>
    </item>
    <item>
      <title>Re: Unexpected output using FIOSET and FIOCLR</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1700034#M53745</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;LI-CODE lang="c"&gt;LPC_GPIO0-&amp;gt;FIOCLR = ((1&amp;lt;&amp;lt;2) | (1&amp;lt;&amp;lt;3) | (1&amp;lt;&amp;lt;24) | (1&amp;lt;&amp;lt;25));	&lt;/LI-CODE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;If you write the it with&lt;/P&gt;
&lt;LI-CODE lang="c"&gt;LPC_GPIO0-&amp;gt;FIOCLR = 0x0300000C;	&lt;/LI-CODE&gt;
&lt;P&gt;Is it okay?&lt;/P&gt;
&lt;P&gt;If it is not, pls try to write the PIOPIN register.&lt;/P&gt;
&lt;P&gt;BTW, pls try to write the mask register as zero before you write the FIOCLR&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 07 Aug 2023 08:30:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1700034#M53745</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2023-08-07T08:30:57Z</dc:date>
    </item>
    <item>
      <title>Re: Unexpected output using FIOSET and FIOCLR</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1700085#M53748</link>
      <description>&lt;P&gt;I already checked the assembler code and value appears to be set correctly:&lt;/P&gt;&lt;LI-CODE lang="c"&gt;0x00000550 210C      MOVS     r1,#0x0C
0x00000552 F2C03100  MOVT     r1,#0x300
   133:         LPC_GPIO0-&amp;gt;FIOCLR = ((1&amp;lt;&amp;lt;2) | (1&amp;lt;&amp;lt;3) | (1&amp;lt;&amp;lt;24) | (1&amp;lt;&amp;lt;25));      // Set PGC and PGD pins low 
0x00000556 61E1      STR      r1,[r4,#0x1C]&lt;/LI-CODE&gt;&lt;P&gt;David&lt;/P&gt;</description>
      <pubDate>Mon, 07 Aug 2023 09:19:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1700085#M53748</guid>
      <dc:creator>perdrix</dc:creator>
      <dc:date>2023-08-07T09:19:13Z</dc:date>
    </item>
    <item>
      <title>Re: Unexpected output using FIOSET and FIOCLR</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1701432#M53792</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;If you toggle the GPIO in a forever loop and check if&lt;/P&gt;
&lt;LI-CODE lang="c"&gt;for(;;)
{
LPC_GPIO0-&amp;gt;FIOCLR = ((1&amp;lt;&amp;lt;2) | (1&amp;lt;&amp;lt;3) | (1&amp;lt;&amp;lt;24) | (1&amp;lt;&amp;lt;25));	// Set PGC and PGD pins low
	LPC_GPIO0-&amp;gt;FIOSET = ((1&amp;lt;&amp;lt;2) | (1&amp;lt;&amp;lt;3) | (1&amp;lt;&amp;lt;23) | (1&amp;lt;&amp;lt;24)|(1&amp;lt;&amp;lt;25) | (1&amp;lt;&amp;lt;26));	// Set MCLR pins high
}
then check if the P0.23 and P0.26 pins toggle or not.
The second test is to write the FIOPIN register directly.
Hope it can help you.
BR
XiangJun rong
&lt;/LI-CODE&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 09 Aug 2023 01:34:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1701432#M53792</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2023-08-09T01:34:04Z</dc:date>
    </item>
    <item>
      <title>Re: Unexpected output using FIOSET and FIOCLR</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1701761#M53800</link>
      <description>&lt;P&gt;Hmmm that produces the following output:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="perdrix_0-1691569786045.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/235716i8E9A9B190A5F5D6A/image-size/medium?v=v2&amp;amp;px=400" role="button" title="perdrix_0-1691569786045.png" alt="perdrix_0-1691569786045.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;So P0.23 and P0.26 don't toggle - its almost as if the setting of the pins to output has forced them low and after that all behaves as expected...&lt;BR /&gt;&lt;BR /&gt;Removing the FIOSET and FIOCLR settings does in fact show that they are forced low when they are set to output mode.&lt;BR /&gt;&lt;BR /&gt;Is there any way that can be controlled by a user program or is that fixed behaviour?&lt;/P&gt;&lt;P&gt;Thanks, David&lt;/P&gt;</description>
      <pubDate>Wed, 09 Aug 2023 08:38:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1701761#M53800</guid>
      <dc:creator>perdrix</dc:creator>
      <dc:date>2023-08-09T08:38:57Z</dc:date>
    </item>
    <item>
      <title>Re: Unexpected output using FIOSET and FIOCLR</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1701850#M53801</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Good news, the GPIO pins toggle as you expected.&lt;/P&gt;
&lt;P&gt;After you write the GPIO direction register, for the first execution of the following instruction &lt;/P&gt;
&lt;PRE class="lia-code-sample  language-c"&gt;&lt;CODE&gt;LPC_GPIO0-&amp;gt;FIOCLR = ((1&amp;lt;&amp;lt;2) | (1&amp;lt;&amp;lt;3) | (1&amp;lt;&amp;lt;24) | (1&amp;lt;&amp;lt;25));	&lt;/CODE&gt;&lt;/PRE&gt;
&lt;P&gt;It appears that all the port pins which are configured as GPIO output will response with the default FIOPIN register value, which leads to the problem.&lt;/P&gt;
&lt;P&gt;If you do want to get deterministic pin logic, pls write the FIOPIN register value before you configure the GPIO direction register.&lt;/P&gt;
&lt;P&gt;Hope it can help you&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 09 Aug 2023 09:33:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Unexpected-output-using-FIOSET-and-FIOCLR/m-p/1701850#M53801</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2023-08-09T09:33:04Z</dc:date>
    </item>
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