LPC Microcontrollersのトピック[LPC55S69] tempature sensor example: how to modify boot clock from PLL1 to PLL0

[LPC55S69] tempature sensor example: how to modify boot clock from PLL1 to PLL0

mat1024 — Wed, 02 Aug 2023 08:36:48 GMT

Hi,

I would like to get help from anyone about the temperature sensor example.

Currently, my code uses PLL0_150M() for the boot clock, but the example requires to use PLL1_150M() for the boot clock.

This causes an error (15: target error from register access) when I kept using PLL0_150() with ADC initialization. It seems that the initialization for ADC, which is below, is trying to change PLL0 even though it was set during the boot.

I also tried to use PLL1 for the boot, but it led to unexpected behavior in other parts of my code.

It would be best if you can guide me to modify the below code properly.

/* Maximum advised frequency for temperature sensor measurement is 6MHz whether the source is XTAL or FRO. * However, the ADC clock divider value is in the range from 1 to 8, so the PLL0(attached to 16MHZ XTAL) * is selected as the ADC clock source with ADC clock divider value as 4. */ /*!< Set up PLL */ CLOCK_AttachClk(kEXT_CLK_to_PLL0); /*!< Switch PLL0CLKSEL to EXT_CLK */ POWER_DisablePD(kPDRUNCFG_PD_PLL0); /* Ensure PLL is on */ POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG); const pll_setup_t pll0Setup = { .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(19U) | SYSCON_PLL0CTRL_SELP(9U), .pllndec = SYSCON_PLL0NDEC_NDIV(1U), .pllpdec = SYSCON_PLL0PDEC_PDIV(16U), .pllsscg = {0x0U, (SYSCON_PLL0SSCG1_MDIV_EXT(32U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)}, .pllRate = 16000000U, .flags = PLL_SETUPFLAG_WAITLOCK}; CLOCK_SetPLL0Freq(&pll0Setup); CLOCK_SetClkDiv(kCLOCK_DivAdcAsyncClk, 0U, true); /*!< Reset ADCCLKDIV divider counter and halt it */ CLOCK_SetClkDiv(kCLOCK_DivAdcAsyncClk, 4U, false); /*!< Set ADCCLKDIV divider to value 4 */ CLOCK_AttachClk(kPLL0_to_ADC_CLK); /*!< Switch ADC_CLK to PLL0 */ /* Disable LDOGPADC power down */ POWER_DisablePD(kPDRUNCFG_PD_LDOGPADC); /* Disable Temperature sensor power down. */ POWER_DisablePD(kPDRUNCFG_PD_TEMPSENS); ANACTRL_Init(ANACTRL); ANACTRL_EnableVref1V(ANACTRL, true);

Any hint/guide/instruction would be greatly appreciated.

Thank you in advance!

Best,

Mat

Re: [LPC55S69] tempature sensor example: how to modify boot clock from PLL1 to PLL0

RaRo — Thu, 03 Aug 2023 20:31:51 GMT

Hello @mat1024,

The section of the code you are referring is setting the clock source of the ADC. LPC55S6x/LPC55S2x/LPC552x Reference Manual. Chapter 39. LPC55S6x/LPC55S2x/LPC552x 16-bit ADC controller. Section 39.7.4. Clock operation mentions that the clock sources for ADC are: MAIN_CLK, PLL0, FRO_HF and FRO1M. The example is using the PLL0 as its source clock.

If you want to use PLL0 as your boot clock, you could select the MAIN_CLK as your ADC's clock source. Next, we share you a possible modification to use BOARD_BootClockPLL150M() and MAIN_CLK instead of BOARD_BootClockPLL1_150M() and PLL0.

In lpadc_temperature_measurement.c's main() be sure to place the following:

BOARD_InitBootPins(); BOARD_BootClockPLL150M(); BOARD_InitDebugConsole(); //Suggested changes CLOCK_SetClkDiv(kCLOCK_DivAdcAsyncClk, 0U, true); /*!< Reset ADCCLKDIV divider counter and halt it */ CLOCK_SetClkDiv(kCLOCK_DivAdcAsyncClk, 4U, false); /*!< Set ADCCLKDIV divider to value 4 */ CLOCK_AttachClk(kMAIN_CLK_to_ADC_CLK); /*!< Switch ADC_CLK to MAIN_CLK */ /* Disable LDOGPADC power down */ POWER_DisablePD(kPDRUNCFG_PD_LDOGPADC); /* Disable Temperature sensor power down. */ POWER_DisablePD(kPDRUNCFG_PD_TEMPSENS);

In clock_config.c's BOARD_BootClockPLL150M() change the Set up PLL as follows:

/*!< Set up PLL */ CLOCK_AttachClk(kEXT_CLK_to_PLL0); /*!< Switch PLL0CLKSEL to EXT_CLK */ POWER_DisablePD(kPDRUNCFG_PD_PLL0); /* Ensure PLL is on */ POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG); const pll_setup_t pll0Setup = { .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(31U), .pllndec = SYSCON_PLL0NDEC_NDIV(8U), .pllpdec = SYSCON_PLL0PDEC_PDIV(1U), .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(150U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)}, .pllRate = 150000000U, .flags = PLL_SETUPFLAG_WAITLOCK }; CLOCK_SetPLL0Freq(&pll0Setup); /*!< Configure PLL0 to the desired values */

Best regards, Raul.