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    <title>topic Re: Missing information on LPC55S69 flash memory map in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Missing-information-on-LPC55S69-flash-memory-map/m-p/1665829#M52910</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Anyway, the space from 0x9_D800 to 0x9DE00 is reserved internally, it is not allowed to be used by customer.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
    <pubDate>Fri, 09 Jun 2023 01:29:52 GMT</pubDate>
    <dc:creator>xiangjun_rong</dc:creator>
    <dc:date>2023-06-09T01:29:52Z</dc:date>
    <item>
      <title>Missing information on LPC55S69 flash memory map</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Missing-information-on-LPC55S69-flash-memory-map/m-p/1665664#M52898</link>
      <description>&lt;P&gt;I'm porting my bootloader to the LPC55S69 and I'm trying to nail down the exact flash memory map for the device and having an unexpectedly tough time of it.&lt;/P&gt;&lt;P&gt;Table 4 shows flash from 0x00000 to 0x9ffff and says that "The last 16 pages (10 KB) are reserved" - the problem here is that the pages are 512 bytes, which comes out to 8 kB. At least one of these numbers seems to be wrong.&lt;/P&gt;&lt;P&gt;The linker definition file provided by MCUX gives 0x00000 to 0x9d800 as the usable program flash region. Table 272 shows the PFR region starting at 0x9de00.&amp;nbsp;That means the PFR takes up 17 pages.&lt;/P&gt;&lt;P&gt;This leaves 1536 bytes or 3 pages unaccounted for between 0x9d800 and 0x9de00.&lt;/P&gt;&lt;P&gt;Additionally, the PEMicro programming algorithm provided (nxp_lpc55s69_1x32x160k.arp) gives a flash size of 0x98000, not 0x9d800. The PFR algorithm shows a start address of 0x9de00 for the PFR.&lt;/P&gt;&lt;P&gt;So how big&amp;nbsp;&lt;EM&gt;is&lt;/EM&gt; the usable flash region? Is it 0x98000? 0x9d800? 0x9de00? There's a discrepancy of 23 kB between these possibilities.&lt;/P&gt;&lt;P&gt;Scott&lt;/P&gt;</description>
      <pubDate>Thu, 08 Jun 2023 00:36:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Missing-information-on-LPC55S69-flash-memory-map/m-p/1665664#M52898</guid>
      <dc:creator>scottm</dc:creator>
      <dc:date>2023-06-08T00:36:33Z</dc:date>
    </item>
    <item>
      <title>Re: Missing information on LPC55S69 flash memory map</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Missing-information-on-LPC55S69-flash-memory-map/m-p/1665745#M52902</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Pls refer to the application note an12949.pdf&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com.cn/docs/en/application-note/AN12949.pdf" target="_blank"&gt;https://www.nxp.com.cn/docs/en/application-note/AN12949.pdf&lt;/A&gt;&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="xiangjun_rong_0-1686192130766.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/226747i021443631D945483/image-size/medium?v=v2&amp;amp;px=400" role="button" title="xiangjun_rong_0-1686192130766.png" alt="xiangjun_rong_0-1686192130766.png" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;The flash size user can use is from 0x0_0000 to 0x9_D7FF for LPC55S69.&lt;/P&gt;
&lt;P&gt;Hope it can help you&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
      <pubDate>Thu, 08 Jun 2023 02:44:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Missing-information-on-LPC55S69-flash-memory-map/m-p/1665745#M52902</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2023-06-08T02:44:19Z</dc:date>
    </item>
    <item>
      <title>Re: Missing information on LPC55S69 flash memory map</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Missing-information-on-LPC55S69-flash-memory-map/m-p/1665757#M52904</link>
      <description>&lt;P&gt;OK, what's located between 0x9d800 and 0x9de00, where the manual says the start of the PFR is? That 1.5 kB would be enough for me to store an entire bootloader. I want to make sure I'm not wasting space.&lt;/P&gt;&lt;P&gt;The "10 KB" part from the manual matches, but where does "16 pages" come from? 10 kB is 20 pages.&lt;/P&gt;&lt;P&gt;Any idea why the programming algorithm is limited to 0x98000?&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Scott&lt;/P&gt;</description>
      <pubDate>Thu, 08 Jun 2023 03:12:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Missing-information-on-LPC55S69-flash-memory-map/m-p/1665757#M52904</guid>
      <dc:creator>scottm</dc:creator>
      <dc:date>2023-06-08T03:12:38Z</dc:date>
    </item>
    <item>
      <title>Re: Missing information on LPC55S69 flash memory map</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Missing-information-on-LPC55S69-flash-memory-map/m-p/1665829#M52910</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Anyway, the space from 0x9_D800 to 0x9DE00 is reserved internally, it is not allowed to be used by customer.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
      <pubDate>Fri, 09 Jun 2023 01:29:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Missing-information-on-LPC55S69-flash-memory-map/m-p/1665829#M52910</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2023-06-09T01:29:52Z</dc:date>
    </item>
    <item>
      <title>Re: Missing information on LPC55S69 flash memory map</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Missing-information-on-LPC55S69-flash-memory-map/m-p/1666339#M52936</link>
      <description>&lt;P&gt;You've got to be kidding me. Where does that number come from? It directly contradicts your last post saying that "The flash size user can use is from 0x0_0000 to 0x9_D7FF for LPC55S69." So there's 22 kB reserved for some undocumented purpose? Why does that disagree with the MCUX linker file, which says 0x9d800?&lt;/P&gt;&lt;P&gt;I think it's more likely you misread 98000 as 9d800, but that perfectly illustrates why I don't trust these numbers. Clearly mistakes have been made somewhere.&lt;/P&gt;&lt;P&gt;To recap, here are our possible values for the top of user flash:&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;98000&lt;/STRONG&gt; P&amp;amp;E algorithm top of flash&lt;BR /&gt;&lt;STRONG&gt;9d800&lt;/STRONG&gt; .ld file, 10 kB from top (per manual)&lt;BR /&gt;&lt;STRONG&gt;9de00&lt;/STRONG&gt; Start of PFR per manual&lt;BR /&gt;&lt;STRONG&gt;9e000&lt;/STRONG&gt; 16 pages from top (also per manual, definitely wrong)&lt;/P&gt;&lt;P&gt;The manual says "The last 16 pages (10 KB) are reserved on the 640 KB flash devices resulting in 630 KB internal flash memory." 16 pages is 8 kB, not 10 kB. If this statement is the&amp;nbsp;&lt;EM&gt;only&lt;/EM&gt; source for the 9d800 figure then I don't trust it because someone didn't check their work.&lt;/P&gt;&lt;P&gt;This deserves an erratum, in my opinion. If there is indeed a reserved 3-page area between 9d800 and 9de00, that should be listed in&amp;nbsp;&lt;EM&gt;some&lt;/EM&gt; memory map somewhere. The PFR has a complete memory map in figure 13 and it starts at 9de00.&lt;/P&gt;&lt;P&gt;Scott&lt;/P&gt;</description>
      <pubDate>Thu, 08 Jun 2023 17:46:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Missing-information-on-LPC55S69-flash-memory-map/m-p/1666339#M52936</guid>
      <dc:creator>scottm</dc:creator>
      <dc:date>2023-06-08T17:46:36Z</dc:date>
    </item>
    <item>
      <title>Re: Missing information on LPC55S69 flash memory map</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Missing-information-on-LPC55S69-flash-memory-map/m-p/1666530#M52937</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;I am sorry, it is a typo, it should have been "Anyway, the space from 0x9_D800 to 0x9_DE00 is reserved internally, it is not allowed to be used by customer".&lt;/P&gt;
&lt;P&gt;It is said that the space from 0x9_D800 to 0x9_DE00 is reserved for ECC(Error Correction Code) for LPC55S69, but it is not confirmed.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 09 Jun 2023 01:43:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Missing-information-on-LPC55S69-flash-memory-map/m-p/1666530#M52937</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2023-06-09T01:43:54Z</dc:date>
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