LPC MicrocontrollersのトピックRe: LPC2388 Toggling *SSEL when using SSP0 for SPI communications

LPC2388 Toggling *SSEL when using SSP0 for SPI communications

perdrix — Wed, 16 Feb 2022 12:46:28 GMT

Reading Chapter 19 (SSP ...) of the User Manual, my understanding of the usage is that I should configure to use SSP0 (say) as SPI, and then use code similar to this:

void SSP_SPI_SR(uint16_t* sendBuffer, uint16_t* recvBuffer, uint8_t length) { uint8 len1 = length, len2 = length; // Ensure SSP receive FIFO is empty (by reading data out of it if necessary) while(SSP0SR & RNE) SSP0DR; IOCLR0 = 0x00100000; // SSEL active (down) while(len1 || len2) { if (len1 && (SSP0SR & TNF)) // Data to send and transmit FIFO isn’t full? { SSPODR = *sendBuffer++; len1--; // // add a wait loop here if need to prevent buffer underrun at slave } if (len2 && (SSP0SR & RNE)) // Data to receive and receive FIFO has data available { *recvBuffer++ = SSP0DR; len2--; } } } IOSET0 = 0x00100000; // SSEL inactive (up) } // Usage : uint16_t pollSequence[9] = {0xEBEB, 0xEBEB, 0xEBEB, 0xEBEB, 0xEBEB, 0xEBEB, 0xEBEB, 0xEBEB, 0xFFFF}; uint16_t pollReplies[9] = {0}; SSP_SPI_SR(pollSequence, pollReplies, 9);

Is that right?

If so I'm puzzled! Using CPOL=1, CPHA=0. Section 19.5.2.4 explicitly says:

However, in the case of continuous back-to-back transmissions, the SSEL signal must be
pulsed HIGH between each data word transfer. This is because the slave select pin
freezes the data in its serial peripheral register and does not allow it to be altered if the
CPHA bit is logic zero. Therefore the master device must raise the SSEL pin of the slave
device between each data transfer to enable the serial peripheral data write. On
completion of the continuous transfer, the SSEL pin is returned to its idle state one SCK
period after the last bit has been captured.

But given that the FIFO is being used for data transmission, I don't understand how I am supposed to toggle *SSEL between transfers.

Help greatly appreciated.

Thanks, David

Re: LPC2388 Toggling *SSEL when using SSP0 for SPI communications

perdrix — Thu, 17 Feb 2022 20:53:35 GMT

Anyone know the answer?

Re: LPC2388 Toggling *SSEL when using SSP0 for SPI communications

Alice_Yang — Tue, 22 Feb 2022 08:55:04 GMT

Hello,

How about refer to demo code how to config:

https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc2000-arm7/arm7-with-512-kb-flash-98-kb-sram-ethernet-usb-2-0-device-host-otg-can-and-10-bit-adc:LPC2388FBD144?tab=Design_Tools_Tab

Alice

Re: LPC2388 Toggling *SSEL when using SSP0 for SPI communications

perdrix — Tue, 22 Feb 2022 10:15:38 GMT

Alice, I downloaded the code samples some time ago. Please could I ask that you point me to the relevant sample that covers this specific question, as I didn't find one that seemed relevant.

Thanks, David

Re: LPC2388 Toggling *SSEL when using SSP0 for SPI communications

fincherdavid — Tue, 22 Feb 2022 14:40:34 GMT

I am referring to document UM10211 which is the official User Manual for the LPC2388:

LPC23XX User manual

Thanks for the pointer to the NXP forums I have posted there.

Re: LPC2388 Toggling *SSEL when using SSP0 for SPI communications

perdrix — Thu, 24 Feb 2022 02:14:27 GMT

Still looking for an answer

Re: LPC2388 Toggling *SSEL when using SSP0 for SPI communications

Alice_Yang — Fri, 25 Feb 2022 04:13:54 GMT

Hello David,

I'm not familiar wit this chip, I meaning you can refer to the ssp demo under Sample Code Bundle.

Alice

Re: LPC2388 Toggling *SSEL when using SSP0 for SPI communications

perdrix — Fri, 25 Feb 2022 09:47:26 GMT

Please apply the little grey cells here and read my code snippet and quote from the manual. The messages to be transmitted are in the transmit FIFO and I have no control over when they are sent, and AFAICT no way to toggle *SSEL between messages. If there's a relevant code in the SSP sample I didn't see it so please point me to the relevant line of code (clearly I know how to manipulate *SSEL before putting messages into the xmit FIFO).

Re: LPC2388 Toggling *SSEL when using SSP0 for SPI communications

Alice_Yang — Thu, 10 Mar 2022 09:58:07 GMT

Hello,

Try to config the SSEL pin as gpio function, then set to high or low.

Alice

Re: LPC2388 Toggling *SSEL when using SSP0 for SPI communications

perdrix — Thu, 10 Mar 2022 10:29:08 GMT

Think about this please. Not a single reply has addressed the issue that I'm adding messages to a FIFO queue to be sent, and I cannot control when they are sent, and there's no obvious way to toggle *SSEL between the transmission of one message and the next.

Re: LPC2388 Toggling *SSEL when using SSP0 for SPI communications

Alice_Yang — Thu, 24 Mar 2022 07:05:03 GMT

Hello,

please test below code if possible:

void SSP0Send( BYTE *send_buf, BYTE *recv_buf, DWORD Length )

{

DWORD i;

BYTE Dummy = Dummy;

for ( i = 0; i < Length; i++ )

{

/* Move on only if NOT busy and TX FIFO not full. */

while ( (SSP0SR & (SSPSR_TNF|SSPSR_BSY)) != SSPSR_TNF );

SSP0DR = *send_buf;

send_buf++;

while ( (SSP0SR & (SSPSR_BSY|SSPSR_RNE)) != SSPSR_RNE );

/* Whenever a byte is written, MISO FIFO counter increments, Clear FIFO

on MISO. Otherwise, when SSP0Receive() is called, previous data byte

is left in the FIFO. */

*recv_buf = SSP0DR;

recv_buf++

/* Wait until the Busy bit is cleared. */

while ( SSP0SR & SSPSR_BSY );

}

return;

}

please also intialize the SSEL pin as GPIO with output mode.

Alice

Re: LPC2388 Toggling *SSEL when using SSP0 for SPI communications

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Re: LPC2388 Toggling *SSEL when using SSP0 for SPI communications

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