<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: LPC552x/S2x: Pacing by DMA requests in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1587454#M51372</link>
    <description>&lt;P&gt;Hello,&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I saw you have 3 cases with some differences in the DMA, for quality of service I will be following your case in one of these.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Pavel&lt;/P&gt;</description>
    <pubDate>Wed, 25 Jan 2023 05:35:49 GMT</pubDate>
    <dc:creator>Pavel_Hernandez</dc:creator>
    <dc:date>2023-01-25T05:35:49Z</dc:date>
    <item>
      <title>LPC552x/S2x: Pacing by DMA requests</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1584506#M51306</link>
      <description>&lt;P&gt;Pacing by DMA requests for serial interfaces such as USART, I2C and I2S is described below by DMATX and DMARX in the FIFOCFG register.&lt;/P&gt;&lt;P&gt;For DMATX:&lt;BR /&gt;"Generate a DMA request for the transmit function if the FIFO is not full."&lt;/P&gt;&lt;P&gt;For DMARX:&lt;BR /&gt;"Generate a DMA request for the receive function if the FIFO is not empty."&lt;/P&gt;&lt;P&gt;On the other hand, each of TXLVL and RXLVL in the FIFOTRIG register can define each FIFO level trigger point.&lt;/P&gt;&lt;P&gt;I have tested using the USART DMA example in the SDK and it seems that a DMA request is generated for each data send/receive, regardless of TXLVL and RXLVL.&lt;/P&gt;&lt;P&gt;I understand that TXLVL and RXLVL are ignored for pacing by DMA requests and that burst transfer by DMA request is not supported, is that correct?&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Daisuke&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 18 Jan 2023 09:34:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1584506#M51306</guid>
      <dc:creator>dmaeda</dc:creator>
      <dc:date>2023-01-18T09:34:45Z</dc:date>
    </item>
    <item>
      <title>Re: LPC552x/S2x: Pacing by DMA requests</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1585349#M51323</link>
      <description>&lt;P&gt;&lt;SPAN&gt;I have contacted TIC support about this.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Thu, 19 Jan 2023 10:18:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1585349#M51323</guid>
      <dc:creator>dmaeda</dc:creator>
      <dc:date>2023-01-19T10:18:17Z</dc:date>
    </item>
    <item>
      <title>Re: LPC552x/S2x: Pacing by DMA requests</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1586299#M51343</link>
      <description>&lt;P&gt;Hello, my name is Pavel, and I will be supporting your case, let me review your information, only for being sure could you tell me the example are you based on?&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Pavel&lt;/P&gt;</description>
      <pubDate>Fri, 20 Jan 2023 22:52:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1586299#M51343</guid>
      <dc:creator>Pavel_Hernandez</dc:creator>
      <dc:date>2023-01-20T22:52:01Z</dc:date>
    </item>
    <item>
      <title>Re: LPC552x/S2x: Pacing by DMA requests</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1586489#M51348</link>
      <description>&lt;P&gt;Hi Pavel-san,&lt;/P&gt;&lt;P&gt;Thank you for your reply.&lt;/P&gt;&lt;P&gt;In the example below in the SDK, even if RXLVL is a value other than 0 (config.rxWatermark ≠ kUSART_RxFifo1), one data is always transferred to the destination buffer each time it is received (key input).&amp;nbsp;RXLVL seems to be ignored by DMA.&lt;/P&gt;&lt;P&gt;\SDK_2_12_0_LPCXpresso55S28\boards\lpcxpresso55s28\driver_examples\usart\dma_double_buffer_transfer&lt;/P&gt;&lt;P&gt;/* Initialize the USART. */&lt;BR /&gt;/*&lt;BR /&gt;* config.baudRate_Bps = 115200U;&lt;BR /&gt;* config.parityMode = kUSART_ParityDisabled;&lt;BR /&gt;* config.stopBitCount = kUSART_OneStopBit;&lt;BR /&gt;* config.txFifoWatermark = 0;&lt;BR /&gt;* config.rxFifoWatermark = 1;&lt;BR /&gt;* config.enableTx = false;&lt;BR /&gt;* config.enableRx = false;&lt;BR /&gt;*/&lt;BR /&gt;USART_GetDefaultConfig(&amp;amp;config);&lt;BR /&gt;config.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE;&lt;BR /&gt;config.enableTx = true;&lt;BR /&gt;config.enableRx = true;&lt;BR /&gt;&lt;FONT color="#FF0000"&gt;&lt;STRONG&gt;config.rxWatermark = kUSART_RxFifo8;&lt;/STRONG&gt;&lt;/FONT&gt;&lt;/P&gt;&lt;P&gt;USART_Init(DEMO_USART, &amp;amp;config, DEMO_USART_CLK_FREQ);&lt;BR /&gt;USART_EnableRxDMA(DEMO_USART, true);&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Daisuke&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Mon, 23 Jan 2023 07:48:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1586489#M51348</guid>
      <dc:creator>dmaeda</dc:creator>
      <dc:date>2023-01-23T07:48:33Z</dc:date>
    </item>
    <item>
      <title>Re: LPC552x/S2x: Pacing by DMA requests</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1586904#M51360</link>
      <description>&lt;P&gt;Dear Pavel-san,&lt;/P&gt;&lt;P&gt;Thank you for your daily support.&lt;/P&gt;&lt;P&gt;I would appreciate it if you respond to my case in TIC instead of this case.&lt;/P&gt;&lt;P&gt;Best regards,&lt;/P&gt;&lt;P&gt;Daisuke&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 24 Jan 2023 04:03:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1586904#M51360</guid>
      <dc:creator>dmaeda</dc:creator>
      <dc:date>2023-01-24T04:03:48Z</dc:date>
    </item>
    <item>
      <title>Re: LPC552x/S2x: Pacing by DMA requests</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1587454#M51372</link>
      <description>&lt;P&gt;Hello,&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I saw you have 3 cases with some differences in the DMA, for quality of service I will be following your case in one of these.&lt;/P&gt;
&lt;P&gt;Best regards,&lt;BR /&gt;Pavel&lt;/P&gt;</description>
      <pubDate>Wed, 25 Jan 2023 05:35:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1587454#M51372</guid>
      <dc:creator>Pavel_Hernandez</dc:creator>
      <dc:date>2023-01-25T05:35:49Z</dc:date>
    </item>
    <item>
      <title>Re: LPC552x/S2x: Pacing by DMA requests</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1587463#M51374</link>
      <description>Dear Pavel-san,&lt;BR /&gt;&lt;BR /&gt;Thank you for your reply and daily support.&lt;BR /&gt;&lt;BR /&gt;I would appreciate it if you respond to my cases in TIC.&lt;BR /&gt;&lt;BR /&gt;Could you close this case?&lt;BR /&gt;&lt;BR /&gt;Best regards,&lt;BR /&gt;&lt;BR /&gt;Daisuke&lt;BR /&gt;</description>
      <pubDate>Wed, 25 Jan 2023 06:03:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC552x-S2x-Pacing-by-DMA-requests/m-p/1587463#M51374</guid>
      <dc:creator>dmaeda</dc:creator>
      <dc:date>2023-01-25T06:03:21Z</dc:date>
    </item>
  </channel>
</rss>

