topic BL & CL parameters in SDR-SDRAM in LPC Microcontrollers https://community.nxp.com/t5/LPC-Microcontrollers/BL-CL-parameters-in-SDR-SDRAM/m-p/522409#M5045 <HTML><HEAD></HEAD><BODY><STRONG>Content originally posted in LPCWare by hamedb3269 on Sat Mar 14 01:17:15 MST 2015</STRONG><BR /><SPAN>hi</SPAN><BR /><SPAN>How BL and CL parameters to be determined?</SPAN><BR /><SPAN>i am using "4M*16bit*4banks" sdram.</SPAN><BR /><SPAN>CLK frequency = 120MHz</SPAN><BR /><BR /></BODY></HTML> Wed, 15 Jun 2016 16:39:16 GMT lpcware 2016-06-15T16:39:16Z BL & CL parameters in SDR-SDRAM https://community.nxp.com/t5/LPC-Microcontrollers/BL-CL-parameters-in-SDR-SDRAM/m-p/522409#M5045 <HTML><HEAD></HEAD><BODY><STRONG>Content originally posted in LPCWare by hamedb3269 on Sat Mar 14 01:17:15 MST 2015</STRONG><BR /><SPAN>hi</SPAN><BR /><SPAN>How BL and CL parameters to be determined?</SPAN><BR /><SPAN>i am using "4M*16bit*4banks" sdram.</SPAN><BR /><SPAN>CLK frequency = 120MHz</SPAN><BR /><BR /></BODY></HTML> Wed, 15 Jun 2016 16:39:16 GMT https://community.nxp.com/t5/LPC-Microcontrollers/BL-CL-parameters-in-SDR-SDRAM/m-p/522409#M5045 lpcware 2016-06-15T16:39:16Z Re: BL & CL parameters in SDR-SDRAM https://community.nxp.com/t5/LPC-Microcontrollers/BL-CL-parameters-in-SDR-SDRAM/m-p/522410#M5046 <HTML><HEAD></HEAD><BODY><STRONG>Content originally posted in LPCWare by mc on Sat Mar 14 06:51:00 MST 2015</STRONG><BR /><SPAN>Hi,</SPAN><BR /><SPAN>BL is burst length.</SPAN><BR /><SPAN>The burst length determines the maximum number of column locations that can be accessed for a given READ or WRITE command.</SPAN><BR /><BR /><SPAN> In LPC Microcontroller like LPC43xx, LPC177x_8x,LPC407x_8x it can be 4 or 8.</SPAN><BR /><SPAN>CL is CAS latency which is explained in JEDEC as </SPAN><BR /><HR /><SPAN style="color: #0000ff;"><STRONG>Quote: </STRONG><BR />The number of clock cycles occurring between the registration of a read command and the active clock transition coincident with the availability of the first resultant output data.</SPAN><HR /><SPAN>,</SPAN><BR /><BR /><SPAN>see below links.</SPAN><BR /><SPAN><A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.jedec.org%2Fstandards-documents%2Fdictionary%2FC" rel="nofollow" target="_blank">http://www.jedec.org/standards-documents/dictionary/C</A></SPAN><BR /><SPAN><A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.jedec.org%2Fstandards-documents%2Fdictionary%2FR" rel="nofollow" target="_blank">http://www.jedec.org/standards-documents/dictionary/R</A></SPAN><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /><BR /></BODY></HTML> Wed, 15 Jun 2016 16:39:17 GMT https://community.nxp.com/t5/LPC-Microcontrollers/BL-CL-parameters-in-SDR-SDRAM/m-p/522410#M5046 lpcware 2016-06-15T16:39:17Z