<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LPC MicrocontrollersのトピックHow to allocate heap memory to external SDRAM</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-to-allocate-heap-memory-to-external-SDRAM/m-p/1505340#M49829</link>
    <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/27788"&gt;@Alice_Yang&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;Thanks for your replay.&lt;/P&gt;&lt;P&gt;As per your suggestion I made simple project to test SDRAM. So far am not using the debugger in our project and am using the uart for&lt;BR /&gt;verifying the program flow .&lt;/P&gt;&lt;P&gt;After checking the SDRAM test code&amp;nbsp; am getting error that Data buss success, address bus failure and last bit of data get corrupted.&lt;/P&gt;&lt;P&gt;-----------------------------------------------------Please find the below code for your reference------------------------------------------------------&lt;/P&gt;&lt;P&gt;status_t SDRAM_DataBusCheck(volatile uint32_t *address)&lt;BR /&gt;{&lt;BR /&gt;uint32_t data = 0;&lt;/P&gt;&lt;P&gt;/* Write the walking 1's data test. */&lt;BR /&gt;for (data = 1; data != 0; data &amp;lt;&amp;lt;= 1)&lt;BR /&gt;{&lt;BR /&gt;*address = data;&lt;/P&gt;&lt;P&gt;/* Read the data out of the address and check. */&lt;BR /&gt;if (*address != data)&lt;BR /&gt;{&lt;BR /&gt;return kStatus_Fail;&lt;BR /&gt;}&lt;BR /&gt;}&lt;BR /&gt;return kStatus_Success;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;status_t SDRAM_AddressBusCheck(volatile uint32_t *address, uint32_t bytes)&lt;BR /&gt;{&lt;BR /&gt;char xyz[10];&lt;BR /&gt;uint32_t pattern = 0x55555555;&lt;BR /&gt;uint32_t size = bytes / 4;&lt;BR /&gt;uint32_t offset;&lt;BR /&gt;uint32_t checkOffset;&lt;/P&gt;&lt;P&gt;/* write the pattern to the power-of-two address. */&lt;BR /&gt;for (offset = 1; offset &amp;lt; size; offset &amp;lt;&amp;lt;= 1)&lt;BR /&gt;{&lt;BR /&gt;address[offset] = pattern;&lt;BR /&gt;}&lt;BR /&gt;address[0] = ~pattern;&lt;/P&gt;&lt;P&gt;/* Read and check. */&lt;BR /&gt;for (offset = 1; offset &amp;lt; size; offset &amp;lt;&amp;lt;= 1)&lt;BR /&gt;{&lt;BR /&gt;if (address[offset] != pattern)&lt;BR /&gt;{&lt;BR /&gt;sprintf(xyz,"%x",address[offset]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[0]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[1]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[2]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[3]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[4]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[5]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[6]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[7]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;/P&gt;&lt;P&gt;return kStatus_Fail;&lt;BR /&gt;}&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;if (address[0] != ~pattern)&lt;BR /&gt;{&lt;BR /&gt;USART_WriteByte(NIBP_USART,'W');&lt;BR /&gt;return kStatus_Fail;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;/* Change the data to the revert one address each time&lt;BR /&gt;* and check there is no effect to other address. */&lt;BR /&gt;for (offset = 1; offset &amp;lt; size; offset &amp;lt;&amp;lt;= 1)&lt;BR /&gt;{&lt;BR /&gt;address[offset] = ~pattern;&lt;BR /&gt;for (checkOffset = 1; checkOffset &amp;lt; size; checkOffset &amp;lt;&amp;lt;= 1)&lt;BR /&gt;{&lt;BR /&gt;if ((checkOffset != offset) &amp;amp;&amp;amp; (address[checkOffset] != pattern))&lt;BR /&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;return kStatus_Fail;&lt;BR /&gt;}&lt;BR /&gt;}&lt;BR /&gt;address[offset] = pattern;&lt;BR /&gt;}&lt;BR /&gt;return kStatus_Success;&lt;BR /&gt;}&lt;BR /&gt;void BOARD_TestSDRAM(void)&lt;BR /&gt;{&lt;BR /&gt;char xyz[10];&lt;BR /&gt;uint32_t *sdram = (uint32_t *)SDRAM_BASE_ADDR;&lt;BR /&gt;uint8_t index;&lt;/P&gt;&lt;P&gt;if (SDRAM_DataBusCheck(sdram) != kStatus_Success)&lt;BR /&gt;{&lt;BR /&gt;USART_WriteByte(NIBP_USART,'D');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'B');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'F');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;/P&gt;&lt;P&gt;// PRINTF("\r\n SDRAM data bus check is failure.\r\n");&lt;BR /&gt;}&lt;BR /&gt;else if (SDRAM_DataBusCheck(sdram) == kStatus_Success)&lt;BR /&gt;{&lt;BR /&gt;USART_WriteByte(NIBP_USART,'D');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'B');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'S');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;/P&gt;&lt;P&gt;}&lt;BR /&gt;if (SDRAM_AddressBusCheck(sdram, SDRAM_SIZE_BYTES) != kStatus_Success)&lt;BR /&gt;{&lt;BR /&gt;USART_WriteByte(NIBP_USART,'A');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'B');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'F');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;/P&gt;&lt;P&gt;// PRINTF("\r\n SDRAM address bus check is failure.\r\n");&lt;BR /&gt;}&lt;BR /&gt;else if (SDRAM_AddressBusCheck(sdram, SDRAM_SIZE_BYTES) == kStatus_Success)&lt;BR /&gt;{&lt;BR /&gt;USART_WriteByte(NIBP_USART,'A');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'B');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'S');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;USART_WriteByte(NIBP_USART,'D');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'S');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'W');&lt;/P&gt;&lt;P&gt;// PRINTF("\r\n Start EMC SDRAM access example.\r\n");&lt;BR /&gt;// PRINTF("\r\n SDRAM Write Start, Start Address 0x%x, Data Length %d !\r\n", sdram, SDRAM_EXAMPLE_DATALEN);&lt;/P&gt;&lt;P&gt;for (index = 0; index &amp;lt; SDRAM_EXAMPLE_DATALEN; index++)&lt;BR /&gt;{&lt;BR /&gt;*(uint32_t *)(sdram + index) = index;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;// PRINTF("\r\n SDRAM Write finished!\r\n");&lt;/P&gt;&lt;P&gt;// PRINTF("\r\n SDRAM Read/Check Start, Start Address 0x%x, Data Length %d !\r\n", sdram, SDRAM_EXAMPLE_DATALEN);&lt;/P&gt;&lt;P&gt;for (index = 0; index &amp;lt; SDRAM_EXAMPLE_DATALEN; index++)&lt;BR /&gt;{&lt;BR /&gt;if (*(uint32_t *)(sdram + index) != index)&lt;BR /&gt;{&lt;BR /&gt;USART_WriteByte(NIBP_USART,'E');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'R');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'R');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;BR /&gt;sprintf(xyz,"%x",index);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[0]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[1]);&lt;BR /&gt;// PRINTF("\r\n SDRAM Write Data and Read Data Check Error!\r\n");&lt;BR /&gt;break;&lt;BR /&gt;}&lt;BR /&gt;}&lt;BR /&gt;USART_WriteByte(NIBP_USART,'D');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'O');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'N');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'E');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;/P&gt;&lt;P&gt;}&lt;BR /&gt;int main(void)&lt;BR /&gt;{&lt;BR /&gt;status_t status;&lt;BR /&gt;ctimer_config_t configtimer;&lt;BR /&gt;ctimer_match_config_t matchConfig;&lt;BR /&gt;enet_config_t config;&lt;BR /&gt;//uint8_t index;&lt;BR /&gt;void *buff;&lt;BR /&gt;phy_speed_t speed;&lt;BR /&gt;phy_duplex_t duplex;&lt;BR /&gt;uint32_t refClock = 50000000;&lt;BR /&gt;uint8_t *buffer;&lt;BR /&gt;uint32_t timedelay;&lt;BR /&gt;bool link=false;&lt;/P&gt;&lt;P&gt;int termWidth;&lt;BR /&gt;int termHeight;&lt;BR /&gt;int temp=0;&lt;BR /&gt;int charWidth;&lt;BR /&gt;int lineHeight;&lt;BR /&gt;int i=0,j=0;&lt;BR /&gt;int c = 0;&lt;BR /&gt;int c_prev = 0;&lt;BR /&gt;unsigned long errRt=0;&lt;BR /&gt;char xyz[10];&lt;BR /&gt;WM_HWIN hItem;&lt;BR /&gt;int xSize=0,ySize=0;&lt;BR /&gt;unsigned int memTest[100];&lt;BR /&gt;static unsigned char Toggleled=0;&lt;BR /&gt;uint32_t index;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;BOARD_InitBootPins();&lt;BR /&gt;BOARD_InitBootClocks();&lt;BR /&gt;BOARD_InitBootPeripherals();&lt;BR /&gt;BOARD_InitSDRAM();&lt;BR /&gt;&lt;BR /&gt;POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*&amp;lt; Turn on USB Phy */&lt;BR /&gt;POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY); /*&amp;lt; Turn on USB Phy */&lt;/P&gt;&lt;P&gt;CLOCK_EnableClock(kCLOCK_Gpio4);&lt;BR /&gt;&lt;BR /&gt;/* Enable the RTC 32K Oscillator */&lt;BR /&gt;SYSCON-&amp;gt;RTCOSCCTRL |= SYSCON_RTCOSCCTRL_EN_MASK;&lt;/P&gt;&lt;P&gt;// For ADC&lt;BR /&gt;/* Enable the asynchronous bridge */&lt;BR /&gt;SYSCON-&amp;gt;ASYNCAPBCTRL = 1;&lt;/P&gt;&lt;P&gt;// Set the back light PWM. Below is not working as Backlight pin is set as permanently high&lt;BR /&gt;BOARD_InitPWM();&lt;BR /&gt;CLOCK_EnableClock(kCLOCK_Sdio);&lt;BR /&gt;//Enable PINT&lt;BR /&gt;CLOCK_EnableClock(kCLOCK_Pint);&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;BOARD_TestSDRAM();&lt;/P&gt;&lt;P&gt;while(1)&lt;BR /&gt;{&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;return 0;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;/---------------------------------------------------------------end------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Fri, 12 Aug 2022 04:01:41 GMT</pubDate>
    <dc:creator>nithin3200</dc:creator>
    <dc:date>2022-08-12T04:01:41Z</dc:date>
    <item>
      <title>How to allocate heap memory to external SDRAM</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-to-allocate-heap-memory-to-external-SDRAM/m-p/1503327#M49806</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;Am using LPC546xx series microcontroller on&amp;nbsp; custom-made board,&amp;nbsp;emwin is used for GUI and my ide is MCUXpresso only. When am using internal memory emwin is working fine. After that&amp;nbsp; memory is increased so am trying to allocate heap memory to external SDRAM(W9825G6KH-6I).Unfortunately that moment emwin is not working.&lt;/P&gt;&lt;P&gt;So any one can suggest me how to allocate heap memory to external SDRAM?.&lt;/P&gt;</description>
      <pubDate>Tue, 09 Aug 2022 13:41:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-to-allocate-heap-memory-to-external-SDRAM/m-p/1503327#M49806</guid>
      <dc:creator>nithin3200</dc:creator>
      <dc:date>2022-08-09T13:41:48Z</dc:date>
    </item>
    <item>
      <title>Re: How to allocate heap memory to external SDRAM</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-to-allocate-heap-memory-to-external-SDRAM/m-p/1504429#M49815</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;Recommend you first using a simple project to confirm the SDRAM can work well,&lt;/P&gt;
&lt;P&gt;There is an application note about&amp;nbsp;&lt;SPAN&gt;how to initialize SDRAM&amp;nbsp;:&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com.cn/docs/en/application-note/AN12423.pdf" target="_blank"&gt;https://www.nxp.com.cn/docs/en/application-note/AN12423.pdf&lt;/A&gt;&amp;nbsp;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Alice&lt;/P&gt;</description>
      <pubDate>Thu, 11 Aug 2022 03:00:54 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-to-allocate-heap-memory-to-external-SDRAM/m-p/1504429#M49815</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2022-08-11T03:00:54Z</dc:date>
    </item>
    <item>
      <title>How to allocate heap memory to external SDRAM</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-to-allocate-heap-memory-to-external-SDRAM/m-p/1505340#M49829</link>
      <description>&lt;P&gt;Hi &lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/27788"&gt;@Alice_Yang&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;Thanks for your replay.&lt;/P&gt;&lt;P&gt;As per your suggestion I made simple project to test SDRAM. So far am not using the debugger in our project and am using the uart for&lt;BR /&gt;verifying the program flow .&lt;/P&gt;&lt;P&gt;After checking the SDRAM test code&amp;nbsp; am getting error that Data buss success, address bus failure and last bit of data get corrupted.&lt;/P&gt;&lt;P&gt;-----------------------------------------------------Please find the below code for your reference------------------------------------------------------&lt;/P&gt;&lt;P&gt;status_t SDRAM_DataBusCheck(volatile uint32_t *address)&lt;BR /&gt;{&lt;BR /&gt;uint32_t data = 0;&lt;/P&gt;&lt;P&gt;/* Write the walking 1's data test. */&lt;BR /&gt;for (data = 1; data != 0; data &amp;lt;&amp;lt;= 1)&lt;BR /&gt;{&lt;BR /&gt;*address = data;&lt;/P&gt;&lt;P&gt;/* Read the data out of the address and check. */&lt;BR /&gt;if (*address != data)&lt;BR /&gt;{&lt;BR /&gt;return kStatus_Fail;&lt;BR /&gt;}&lt;BR /&gt;}&lt;BR /&gt;return kStatus_Success;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;status_t SDRAM_AddressBusCheck(volatile uint32_t *address, uint32_t bytes)&lt;BR /&gt;{&lt;BR /&gt;char xyz[10];&lt;BR /&gt;uint32_t pattern = 0x55555555;&lt;BR /&gt;uint32_t size = bytes / 4;&lt;BR /&gt;uint32_t offset;&lt;BR /&gt;uint32_t checkOffset;&lt;/P&gt;&lt;P&gt;/* write the pattern to the power-of-two address. */&lt;BR /&gt;for (offset = 1; offset &amp;lt; size; offset &amp;lt;&amp;lt;= 1)&lt;BR /&gt;{&lt;BR /&gt;address[offset] = pattern;&lt;BR /&gt;}&lt;BR /&gt;address[0] = ~pattern;&lt;/P&gt;&lt;P&gt;/* Read and check. */&lt;BR /&gt;for (offset = 1; offset &amp;lt; size; offset &amp;lt;&amp;lt;= 1)&lt;BR /&gt;{&lt;BR /&gt;if (address[offset] != pattern)&lt;BR /&gt;{&lt;BR /&gt;sprintf(xyz,"%x",address[offset]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[0]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[1]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[2]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[3]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[4]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[5]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[6]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[7]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;/P&gt;&lt;P&gt;return kStatus_Fail;&lt;BR /&gt;}&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;if (address[0] != ~pattern)&lt;BR /&gt;{&lt;BR /&gt;USART_WriteByte(NIBP_USART,'W');&lt;BR /&gt;return kStatus_Fail;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;/* Change the data to the revert one address each time&lt;BR /&gt;* and check there is no effect to other address. */&lt;BR /&gt;for (offset = 1; offset &amp;lt; size; offset &amp;lt;&amp;lt;= 1)&lt;BR /&gt;{&lt;BR /&gt;address[offset] = ~pattern;&lt;BR /&gt;for (checkOffset = 1; checkOffset &amp;lt; size; checkOffset &amp;lt;&amp;lt;= 1)&lt;BR /&gt;{&lt;BR /&gt;if ((checkOffset != offset) &amp;amp;&amp;amp; (address[checkOffset] != pattern))&lt;BR /&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;return kStatus_Fail;&lt;BR /&gt;}&lt;BR /&gt;}&lt;BR /&gt;address[offset] = pattern;&lt;BR /&gt;}&lt;BR /&gt;return kStatus_Success;&lt;BR /&gt;}&lt;BR /&gt;void BOARD_TestSDRAM(void)&lt;BR /&gt;{&lt;BR /&gt;char xyz[10];&lt;BR /&gt;uint32_t *sdram = (uint32_t *)SDRAM_BASE_ADDR;&lt;BR /&gt;uint8_t index;&lt;/P&gt;&lt;P&gt;if (SDRAM_DataBusCheck(sdram) != kStatus_Success)&lt;BR /&gt;{&lt;BR /&gt;USART_WriteByte(NIBP_USART,'D');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'B');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'F');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;/P&gt;&lt;P&gt;// PRINTF("\r\n SDRAM data bus check is failure.\r\n");&lt;BR /&gt;}&lt;BR /&gt;else if (SDRAM_DataBusCheck(sdram) == kStatus_Success)&lt;BR /&gt;{&lt;BR /&gt;USART_WriteByte(NIBP_USART,'D');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'B');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'S');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;/P&gt;&lt;P&gt;}&lt;BR /&gt;if (SDRAM_AddressBusCheck(sdram, SDRAM_SIZE_BYTES) != kStatus_Success)&lt;BR /&gt;{&lt;BR /&gt;USART_WriteByte(NIBP_USART,'A');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'B');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'F');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;/P&gt;&lt;P&gt;// PRINTF("\r\n SDRAM address bus check is failure.\r\n");&lt;BR /&gt;}&lt;BR /&gt;else if (SDRAM_AddressBusCheck(sdram, SDRAM_SIZE_BYTES) == kStatus_Success)&lt;BR /&gt;{&lt;BR /&gt;USART_WriteByte(NIBP_USART,'A');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'B');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'S');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;USART_WriteByte(NIBP_USART,'D');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'S');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'W');&lt;/P&gt;&lt;P&gt;// PRINTF("\r\n Start EMC SDRAM access example.\r\n");&lt;BR /&gt;// PRINTF("\r\n SDRAM Write Start, Start Address 0x%x, Data Length %d !\r\n", sdram, SDRAM_EXAMPLE_DATALEN);&lt;/P&gt;&lt;P&gt;for (index = 0; index &amp;lt; SDRAM_EXAMPLE_DATALEN; index++)&lt;BR /&gt;{&lt;BR /&gt;*(uint32_t *)(sdram + index) = index;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;// PRINTF("\r\n SDRAM Write finished!\r\n");&lt;/P&gt;&lt;P&gt;// PRINTF("\r\n SDRAM Read/Check Start, Start Address 0x%x, Data Length %d !\r\n", sdram, SDRAM_EXAMPLE_DATALEN);&lt;/P&gt;&lt;P&gt;for (index = 0; index &amp;lt; SDRAM_EXAMPLE_DATALEN; index++)&lt;BR /&gt;{&lt;BR /&gt;if (*(uint32_t *)(sdram + index) != index)&lt;BR /&gt;{&lt;BR /&gt;USART_WriteByte(NIBP_USART,'E');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'R');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'R');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;BR /&gt;sprintf(xyz,"%x",index);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[0]);&lt;BR /&gt;USART_WriteByte(NIBP_USART,xyz[1]);&lt;BR /&gt;// PRINTF("\r\n SDRAM Write Data and Read Data Check Error!\r\n");&lt;BR /&gt;break;&lt;BR /&gt;}&lt;BR /&gt;}&lt;BR /&gt;USART_WriteByte(NIBP_USART,'D');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'O');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'N');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'E');&lt;BR /&gt;USART_WriteByte(NIBP_USART,'-');&lt;/P&gt;&lt;P&gt;}&lt;BR /&gt;int main(void)&lt;BR /&gt;{&lt;BR /&gt;status_t status;&lt;BR /&gt;ctimer_config_t configtimer;&lt;BR /&gt;ctimer_match_config_t matchConfig;&lt;BR /&gt;enet_config_t config;&lt;BR /&gt;//uint8_t index;&lt;BR /&gt;void *buff;&lt;BR /&gt;phy_speed_t speed;&lt;BR /&gt;phy_duplex_t duplex;&lt;BR /&gt;uint32_t refClock = 50000000;&lt;BR /&gt;uint8_t *buffer;&lt;BR /&gt;uint32_t timedelay;&lt;BR /&gt;bool link=false;&lt;/P&gt;&lt;P&gt;int termWidth;&lt;BR /&gt;int termHeight;&lt;BR /&gt;int temp=0;&lt;BR /&gt;int charWidth;&lt;BR /&gt;int lineHeight;&lt;BR /&gt;int i=0,j=0;&lt;BR /&gt;int c = 0;&lt;BR /&gt;int c_prev = 0;&lt;BR /&gt;unsigned long errRt=0;&lt;BR /&gt;char xyz[10];&lt;BR /&gt;WM_HWIN hItem;&lt;BR /&gt;int xSize=0,ySize=0;&lt;BR /&gt;unsigned int memTest[100];&lt;BR /&gt;static unsigned char Toggleled=0;&lt;BR /&gt;uint32_t index;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;&lt;BR /&gt;BOARD_InitBootPins();&lt;BR /&gt;BOARD_InitBootClocks();&lt;BR /&gt;BOARD_InitBootPeripherals();&lt;BR /&gt;BOARD_InitSDRAM();&lt;BR /&gt;&lt;BR /&gt;POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*&amp;lt; Turn on USB Phy */&lt;BR /&gt;POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY); /*&amp;lt; Turn on USB Phy */&lt;/P&gt;&lt;P&gt;CLOCK_EnableClock(kCLOCK_Gpio4);&lt;BR /&gt;&lt;BR /&gt;/* Enable the RTC 32K Oscillator */&lt;BR /&gt;SYSCON-&amp;gt;RTCOSCCTRL |= SYSCON_RTCOSCCTRL_EN_MASK;&lt;/P&gt;&lt;P&gt;// For ADC&lt;BR /&gt;/* Enable the asynchronous bridge */&lt;BR /&gt;SYSCON-&amp;gt;ASYNCAPBCTRL = 1;&lt;/P&gt;&lt;P&gt;// Set the back light PWM. Below is not working as Backlight pin is set as permanently high&lt;BR /&gt;BOARD_InitPWM();&lt;BR /&gt;CLOCK_EnableClock(kCLOCK_Sdio);&lt;BR /&gt;//Enable PINT&lt;BR /&gt;CLOCK_EnableClock(kCLOCK_Pint);&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;BOARD_TestSDRAM();&lt;/P&gt;&lt;P&gt;while(1)&lt;BR /&gt;{&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;return 0;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;/---------------------------------------------------------------end------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Fri, 12 Aug 2022 04:01:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-to-allocate-heap-memory-to-external-SDRAM/m-p/1505340#M49829</guid>
      <dc:creator>nithin3200</dc:creator>
      <dc:date>2022-08-12T04:01:41Z</dc:date>
    </item>
    <item>
      <title>Re: How to allocate heap memory to external SDRAM</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-to-allocate-heap-memory-to-external-SDRAM/m-p/1506124#M49850</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;So first of all you need make the SDRAM work well.&lt;/P&gt;
&lt;P&gt;Do you initialize SDRAM before use?&lt;/P&gt;
&lt;P&gt;About SDRAM hardware connection, you can refer to schematic of lpcxpresso54628-evk:&lt;/P&gt;
&lt;P&gt;&lt;A href="https://www.nxp.com.cn/downloads/en/schematics/LPCXpresso546xx-540xx.zip" target="_blank"&gt;https://www.nxp.com.cn/downloads/en/schematics/LPCXpresso546xx-540xx.zip&lt;/A&gt;&amp;nbsp;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;Alice&lt;/P&gt;</description>
      <pubDate>Mon, 15 Aug 2022 09:28:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-to-allocate-heap-memory-to-external-SDRAM/m-p/1506124#M49850</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2022-08-15T09:28:24Z</dc:date>
    </item>
    <item>
      <title>Re: How to allocate heap memory to external SDRAM</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-to-allocate-heap-memory-to-external-SDRAM/m-p/1507483#M49869</link>
      <description>&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Hi&amp;nbsp;&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/27788"&gt;@Alice_Yang&lt;/a&gt;,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks for the replay.&lt;/P&gt;&lt;P&gt;Yes, I am&amp;nbsp; initialize SDRAM before use. After cross checking my schematic and&lt;SPAN&gt;&amp;nbsp;lpcxpresso54628-evk.There no difference&amp;nbsp;in hardware.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 17 Aug 2022 11:29:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-to-allocate-heap-memory-to-external-SDRAM/m-p/1507483#M49869</guid>
      <dc:creator>nithin3200</dc:creator>
      <dc:date>2022-08-17T11:29:04Z</dc:date>
    </item>
    <item>
      <title>Re: How to allocate heap memory to external SDRAM</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-to-allocate-heap-memory-to-external-SDRAM/m-p/1508760#M49893</link>
      <description>&lt;P&gt;Hello,&lt;/P&gt;
&lt;P&gt;How do you&amp;nbsp;&lt;SPAN&gt;initialize SDRAM?&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Do you have lpcxpresso54628-evk board? If have, test your simple project on it.&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;If no, you can send it to me, I check it on my side.&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;BR&lt;/SPAN&gt;&lt;/P&gt;
&lt;P&gt;&lt;SPAN&gt;Alice&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Fri, 19 Aug 2022 10:47:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-to-allocate-heap-memory-to-external-SDRAM/m-p/1508760#M49893</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2022-08-19T10:47:15Z</dc:date>
    </item>
  </channel>
</rss>

