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    <title>topic sdram initialization in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/sdram-initialization/m-p/522190#M4826</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by hamedb3269 on Sat Mar 07 09:06:12 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;This line is written for what purpose?&lt;/SPAN&gt;&lt;BR /&gt;&lt;A href="http://"&gt;http://uupload.ir/files/pw5x_untitled.bmp&lt;/A&gt;&lt;BR /&gt;&lt;SPAN&gt;i am using K4S561632 or MT48LC16M16.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CLK Frequency is 120MHz.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CAS Latency is 3&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;RAS Latency is 3&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 16:38:43 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T16:38:43Z</dc:date>
    <item>
      <title>sdram initialization</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/sdram-initialization/m-p/522190#M4826</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by hamedb3269 on Sat Mar 07 09:06:12 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;This line is written for what purpose?&lt;/SPAN&gt;&lt;BR /&gt;&lt;A href="http://"&gt;http://uupload.ir/files/pw5x_untitled.bmp&lt;/A&gt;&lt;BR /&gt;&lt;SPAN&gt;i am using K4S561632 or MT48LC16M16.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CLK Frequency is 120MHz.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CAS Latency is 3&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;RAS Latency is 3&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 16:38:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/sdram-initialization/m-p/522190#M4826</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T16:38:43Z</dc:date>
    </item>
    <item>
      <title>Re: sdram initialization</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/sdram-initialization/m-p/522191#M4827</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by mc on Sat Mar 07 10:58:41 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;To configure SDRAM to a specific mode of operation. Command set the read latency, burst length,and burst type etc to be used during read/write operations to the SDRAM.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 16:38:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/sdram-initialization/m-p/522191#M4827</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T16:38:44Z</dc:date>
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