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    <title>topic SGPIO with external clock and 1-bit input in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/SGPIO-with-external-clock-and-1-bit-input/m-p/522180#M4816</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by rnunes on Thu Jul 16 07:43:42 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm trying to implement a 1 bit "slave" device, with clock on SGPIO9 (pin 1.2) and using SGPIO3 (pin 1.16 - slice J0) as input, but I can't trigger anything.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Here's the code (I have a LPC4337):&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
#define SGPIO_SLICE (10) // Slice J
#define CMD_SGPIO_PIN (3)


&amp;nbsp;&amp;nbsp;&amp;nbsp; // Initialize the SGPIO interrupt (shared by shift/capture/match/input)
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; NVIC_DisableIRQ(SGPIO_INT_IRQn);

&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // clear interrupt status and wait for it to clear
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO-&amp;gt;CTR_STATUS_1 = 0xffff;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while(LPC_SGPIO-&amp;gt;STATUS_1 &amp;amp; 0xffff);
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO-&amp;gt;CTR_STATUS_2 = 0xffff;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while(LPC_SGPIO-&amp;gt;STATUS_2 &amp;amp; 0xffff);
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO-&amp;gt;CTR_STATUS_3 = 0xffff;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while(LPC_SGPIO-&amp;gt;STATUS_3 &amp;amp; 0xffff);

&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // disable all SGPIO interrupts
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO-&amp;gt;CLR_EN_1 = 0xffff;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while(LPC_SGPIO-&amp;gt;ENABLE_1 &amp;amp; 0xffff);
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO-&amp;gt;CLR_EN_2 = 0xffff;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while(LPC_SGPIO-&amp;gt;ENABLE_2 &amp;amp; 0xffff);
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO-&amp;gt;CLR_EN_3 = 0xffff;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while(LPC_SGPIO-&amp;gt;ENABLE_3 &amp;amp; 0xffff);

&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; NVIC_EnableIRQ(SGPIO_INT_IRQn);

LPC_SGPIO-&amp;gt;CTRL_ENABLED = 0; // disable all counters

// Configure pins
/// See Table 187. Pin multiplexing
Chip_SCU_PinMuxSet(1, 2, SCU_MODE_FUNC3 | SCU_PINIO_FAST);
Chip_SCU_PinMuxSet(1, 16, SCU_MODE_FUNC2 | SCU_PINIO_FAST);

//Connect SGPIO clock to Main_PLL
Chip_Clock_SetBaseClock(CLK_BASE_PERIPH, CLKIN_MAINPLL, true, false);

LPC_SGPIO-&amp;gt;OUT_MUX_CFG[CMD_SGPIO_PIN] = 0;

LPC_SGPIO-&amp;gt;SGPIO_MUX_CFG[SGPIO_SLICE] =
1 &amp;lt;&amp;lt; 0 |&amp;nbsp;&amp;nbsp;&amp;nbsp; // EXT_CLK_ENABLE
1 &amp;lt;&amp;lt; 1 |&amp;nbsp;&amp;nbsp;&amp;nbsp; // CLK_SRC SGPIO9
3 &amp;lt;&amp;lt; 5 |&amp;nbsp;&amp;nbsp;&amp;nbsp; // Qualifier mode : external clock
1 &amp;lt;&amp;lt; 7;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Qualifier pin: SGPIO9

LPC_SGPIO-&amp;gt;SLICE_MUX_CFG[SGPIO_SLICE] =
(0L &amp;lt;&amp;lt; 8) | // INV_QUALIFIER = 0 (use normal qualifier)
(0L &amp;lt;&amp;lt; 6) | // PARALLEL_MODE = 0 (shift 1 bit per clock)
(0L &amp;lt;&amp;lt; 4) | // DATA_CAPTURE_MODE = 0 (detect rising edge)
(0L &amp;lt;&amp;lt; 3) | // INV_OUT_CLK = 0 (normal clock)
(1L &amp;lt;&amp;lt; 2) | // CLKGEN_MODE = 1 (use external clock)
(0L &amp;lt;&amp;lt; 1) | // CLK_CAPTURE_MODE = 0 (use rising clock edge)
(0L &amp;lt;&amp;lt; 0);&amp;nbsp; // MATCH_MODE = 0 (do not match data)

LPC_SGPIO-&amp;gt;POS[SGPIO_SLICE] = (32UL-1) | (32UL-1)&amp;lt;&amp;lt;8; //Reload value for POS (32)

LPC_SGPIO-&amp;gt;REG[SGPIO_SLICE] = 0x55555555; // Primary output data register
LPC_SGPIO-&amp;gt;REG_SS[SGPIO_SLICE] = 0x55555555; // Shadow output data register

LPC_SGPIO-&amp;gt; GPIO_OUTREG = 0x00; // all pins input
LPC_SGPIO -&amp;gt; SET_EN_1 = 1 &amp;lt;&amp;lt; SGPIO_SLICE;
LPC_SGPIO-&amp;gt; CTR_STATUS_1 = 0xFFFF;

LPC_SGPIO-&amp;gt;CTRL_ENABLED = (1 &amp;lt;&amp;lt; SGPIO_SLICE);
LPC_SGPIO-&amp;gt;CTRL_DISABLED = ~( 1 &amp;lt;&amp;lt; SGPIO_SLICE);&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;After that I try to use it with this code:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;if(LPC_SGPIO-&amp;gt;STATUS_1 &amp;amp; (1 &amp;lt;&amp;lt; SGPIO_SLICE))
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; bits = 32;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; *ptr++ = LPC_SGPIO-&amp;gt;REG[SGPIO_SLICE];

&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO -&amp;gt; CTR_STATUS_1 = 1 &amp;lt;&amp;lt; SGPIO_SLICE;

&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while( ! (LPC_SGPIO-&amp;gt;STATUS_1 &amp;amp; (1 &amp;lt;&amp;lt; SGPIO_SLICE)));
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;But STATUS_1 it's always 0, and I can see the data correctly in oscilloscope. Am I missing something?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 16:37:57 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T16:37:57Z</dc:date>
    <item>
      <title>SGPIO with external clock and 1-bit input</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SGPIO-with-external-clock-and-1-bit-input/m-p/522180#M4816</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by rnunes on Thu Jul 16 07:43:42 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm trying to implement a 1 bit "slave" device, with clock on SGPIO9 (pin 1.2) and using SGPIO3 (pin 1.16 - slice J0) as input, but I can't trigger anything.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Here's the code (I have a LPC4337):&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
#define SGPIO_SLICE (10) // Slice J
#define CMD_SGPIO_PIN (3)


&amp;nbsp;&amp;nbsp;&amp;nbsp; // Initialize the SGPIO interrupt (shared by shift/capture/match/input)
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; NVIC_DisableIRQ(SGPIO_INT_IRQn);

&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // clear interrupt status and wait for it to clear
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO-&amp;gt;CTR_STATUS_1 = 0xffff;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while(LPC_SGPIO-&amp;gt;STATUS_1 &amp;amp; 0xffff);
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO-&amp;gt;CTR_STATUS_2 = 0xffff;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while(LPC_SGPIO-&amp;gt;STATUS_2 &amp;amp; 0xffff);
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO-&amp;gt;CTR_STATUS_3 = 0xffff;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while(LPC_SGPIO-&amp;gt;STATUS_3 &amp;amp; 0xffff);

&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // disable all SGPIO interrupts
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO-&amp;gt;CLR_EN_1 = 0xffff;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while(LPC_SGPIO-&amp;gt;ENABLE_1 &amp;amp; 0xffff);
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO-&amp;gt;CLR_EN_2 = 0xffff;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while(LPC_SGPIO-&amp;gt;ENABLE_2 &amp;amp; 0xffff);
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO-&amp;gt;CLR_EN_3 = 0xffff;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while(LPC_SGPIO-&amp;gt;ENABLE_3 &amp;amp; 0xffff);

&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; NVIC_EnableIRQ(SGPIO_INT_IRQn);

LPC_SGPIO-&amp;gt;CTRL_ENABLED = 0; // disable all counters

// Configure pins
/// See Table 187. Pin multiplexing
Chip_SCU_PinMuxSet(1, 2, SCU_MODE_FUNC3 | SCU_PINIO_FAST);
Chip_SCU_PinMuxSet(1, 16, SCU_MODE_FUNC2 | SCU_PINIO_FAST);

//Connect SGPIO clock to Main_PLL
Chip_Clock_SetBaseClock(CLK_BASE_PERIPH, CLKIN_MAINPLL, true, false);

LPC_SGPIO-&amp;gt;OUT_MUX_CFG[CMD_SGPIO_PIN] = 0;

LPC_SGPIO-&amp;gt;SGPIO_MUX_CFG[SGPIO_SLICE] =
1 &amp;lt;&amp;lt; 0 |&amp;nbsp;&amp;nbsp;&amp;nbsp; // EXT_CLK_ENABLE
1 &amp;lt;&amp;lt; 1 |&amp;nbsp;&amp;nbsp;&amp;nbsp; // CLK_SRC SGPIO9
3 &amp;lt;&amp;lt; 5 |&amp;nbsp;&amp;nbsp;&amp;nbsp; // Qualifier mode : external clock
1 &amp;lt;&amp;lt; 7;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Qualifier pin: SGPIO9

LPC_SGPIO-&amp;gt;SLICE_MUX_CFG[SGPIO_SLICE] =
(0L &amp;lt;&amp;lt; 8) | // INV_QUALIFIER = 0 (use normal qualifier)
(0L &amp;lt;&amp;lt; 6) | // PARALLEL_MODE = 0 (shift 1 bit per clock)
(0L &amp;lt;&amp;lt; 4) | // DATA_CAPTURE_MODE = 0 (detect rising edge)
(0L &amp;lt;&amp;lt; 3) | // INV_OUT_CLK = 0 (normal clock)
(1L &amp;lt;&amp;lt; 2) | // CLKGEN_MODE = 1 (use external clock)
(0L &amp;lt;&amp;lt; 1) | // CLK_CAPTURE_MODE = 0 (use rising clock edge)
(0L &amp;lt;&amp;lt; 0);&amp;nbsp; // MATCH_MODE = 0 (do not match data)

LPC_SGPIO-&amp;gt;POS[SGPIO_SLICE] = (32UL-1) | (32UL-1)&amp;lt;&amp;lt;8; //Reload value for POS (32)

LPC_SGPIO-&amp;gt;REG[SGPIO_SLICE] = 0x55555555; // Primary output data register
LPC_SGPIO-&amp;gt;REG_SS[SGPIO_SLICE] = 0x55555555; // Shadow output data register

LPC_SGPIO-&amp;gt; GPIO_OUTREG = 0x00; // all pins input
LPC_SGPIO -&amp;gt; SET_EN_1 = 1 &amp;lt;&amp;lt; SGPIO_SLICE;
LPC_SGPIO-&amp;gt; CTR_STATUS_1 = 0xFFFF;

LPC_SGPIO-&amp;gt;CTRL_ENABLED = (1 &amp;lt;&amp;lt; SGPIO_SLICE);
LPC_SGPIO-&amp;gt;CTRL_DISABLED = ~( 1 &amp;lt;&amp;lt; SGPIO_SLICE);&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;After that I try to use it with this code:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;if(LPC_SGPIO-&amp;gt;STATUS_1 &amp;amp; (1 &amp;lt;&amp;lt; SGPIO_SLICE))
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; {
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; bits = 32;
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; *ptr++ = LPC_SGPIO-&amp;gt;REG[SGPIO_SLICE];

&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_SGPIO -&amp;gt; CTR_STATUS_1 = 1 &amp;lt;&amp;lt; SGPIO_SLICE;

&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; while( ! (LPC_SGPIO-&amp;gt;STATUS_1 &amp;amp; (1 &amp;lt;&amp;lt; SGPIO_SLICE)));
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;But STATUS_1 it's always 0, and I can see the data correctly in oscilloscope. Am I missing something?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 16:37:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SGPIO-with-external-clock-and-1-bit-input/m-p/522180#M4816</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T16:37:57Z</dc:date>
    </item>
    <item>
      <title>Re: SGPIO with external clock and 1-bit input</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SGPIO-with-external-clock-and-1-bit-input/m-p/522181#M4817</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by DF9DQ on Sat Jul 18 12:36:56 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;In SGPIO_MUX_CFG you select SGPIO9 to be both the clock and the clock qualifier at the same time. That won't work.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I assume you do not want to qualify (= gate) the clock by any signal at all, but rather have all clock pulses shift the slice. In that case set the QUALIFIER_MODE field in SGPIO_MUX_CFG to 0 ("Enable"). The QUALIFIER_PIN_MODE and QUALIFIER_SLICE_MODE fields are don't care's then.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 16:37:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SGPIO-with-external-clock-and-1-bit-input/m-p/522181#M4817</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T16:37:58Z</dc:date>
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