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    <title>LPC MicrocontrollersのトピックLPC550x code read protection</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC550x-code-read-protection/m-p/1414453#M47922</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;On previous NXP MCU's there was a CRP to configure code read protection. How can we enable code read protection on the LPC550x MCU.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks in advance&lt;/P&gt;&lt;P&gt;Kind regards&lt;/P&gt;&lt;P&gt;Johan Leroy&lt;/P&gt;</description>
    <pubDate>Wed, 16 Feb 2022 12:56:59 GMT</pubDate>
    <dc:creator>johanleroy</dc:creator>
    <dc:date>2022-02-16T12:56:59Z</dc:date>
    <item>
      <title>LPC550x code read protection</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC550x-code-read-protection/m-p/1414453#M47922</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;On previous NXP MCU's there was a CRP to configure code read protection. How can we enable code read protection on the LPC550x MCU.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thanks in advance&lt;/P&gt;&lt;P&gt;Kind regards&lt;/P&gt;&lt;P&gt;Johan Leroy&lt;/P&gt;</description>
      <pubDate>Wed, 16 Feb 2022 12:56:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC550x-code-read-protection/m-p/1414453#M47922</guid>
      <dc:creator>johanleroy</dc:creator>
      <dc:date>2022-02-16T12:56:59Z</dc:date>
    </item>
    <item>
      <title>Re: LPC550x code read protection</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC550x-code-read-protection/m-p/1415597#M47930</link>
      <description>&lt;P&gt;Hi&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/72428"&gt;@johanleroy&lt;/a&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;I hope that you are doing well!&lt;/P&gt;
&lt;P&gt;All of the LPC55 MCUs provide&amp;nbsp; features to disable ISP entry and debug access , even the ones that do not have an &lt;STRONG&gt;S&lt;/STRONG&gt; ( LPC55&lt;STRONG&gt;S&lt;/STRONG&gt; security modules such as PRINCE , secure boot etc. ). This is done by setting dedicated bits on the CMPA and CFPA areas&amp;nbsp; protected flash region or PFR. Refer to SOCU_PIN and SOCU_DFLT on the user manual&lt;/P&gt;
&lt;P&gt;The PFR can be programmed from the application (using API) or using tools such as the MCUXpresso secure provisioning tool , elftosb gui, or by&amp;nbsp; directly writing CMPA and CFPA using bl-host.&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Those settings might be confusing at first glance and if there is any improper setting into the PFR you might brick your chip. If you disable ISP and debug access you won't be able to recover the MCU externally.&lt;/P&gt;
&lt;P&gt;Let me know if&amp;nbsp; you have any other question&lt;/P&gt;
&lt;P&gt;Diego.&lt;/P&gt;</description>
      <pubDate>Thu, 17 Feb 2022 23:45:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC550x-code-read-protection/m-p/1415597#M47930</guid>
      <dc:creator>diego_charles</dc:creator>
      <dc:date>2022-02-17T23:45:28Z</dc:date>
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