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  <channel>
    <title>topic LPC54607 Run functions into sdram in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54607-Run-functions-into-sdram/m-p/1410712#M47859</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;My problem is about MCU flash size. Flash size is not enough for me. So want to some of fonctions put into sdram.&lt;/P&gt;&lt;P&gt;in the document,&amp;nbsp;&lt;A href="https://www.nxp.com/docs/en/application-note/AN12423.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN12423.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;There is memory allocation section , i saw something like that ;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;#define m_sdram_start 0xA0000000
#define m_sdram_size 0x80000
LR_m_sdram_text m_sdram_start m_sdram_size {
*(SDRAM_Data)
*(SDRAM_Function)
core_list_join.o
core_matrix.o
core_state.o
core_util.o
} &lt;/LI-CODE&gt;&lt;P&gt;This is part of linker file.&amp;nbsp;&lt;/P&gt;&lt;P&gt;what does it mean? So core_list_join.o located sdram and others into flash?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;i added this into linker file. My fille is;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;#!armclang --target=arm-arm-none-eabi -mcpu=cortex-m4 -E -x c
/*
** ###################################################################
**     Processors:          LPC54607J256BD208
**                          LPC54607J256ET180
**
**     Compiler:            Keil ARM C/C++ Compiler
**     Reference manual:    LPC546xx User manual Rev.1.9  5 June 2017
**     Version:             rev. 1.2, 2017-06-08
**     Build:               b190923
**
**     Abstract:
**         Linker file for the Keil ARM C/C++ Compiler
**
**     Copyright 2016 Freescale Semiconductor, Inc.
**     Copyright 2016-2019 NXP
**     All rights reserved.
**
**     SPDX-License-Identifier: BSD-3-Clause
**
**     http:                 www.nxp.com
**     mail:                 support@nxp.com
**
** ###################################################################
*/


; normal flashdan çalisma.
#define m_interrupts_start             0x00000000
#define m_interrupts_size              0x00000400

#define m_text_start                   0x00000400
#define m_text_size                    0x0003FC00

#define m_data_start                   0x20000000
#define m_data_size                    0x00018000

#define m_usb_sram_start               0x40100000
#define m_usb_sram_size                0x00002000

#define m_sdram_start 				   0xA0000000
#define m_sdram_size 				   0x80000
LR_m_sdram_text m_sdram_start m_sdram_size {
*(SDRAM_Data)
*(SDRAM_Function)
core_list_join.o
core_matrix.o
core_state.o
core_util.o
} 

/* USB BDT size */
#define usb_bdt_size                   0x0
/* Sizes */
#if (defined(__stack_size__))
  #define Stack_Size                   __stack_size__
#else
  #define Stack_Size                   0x0400
#endif

#if (defined(__heap_size__))
  #define Heap_Size                    __heap_size__
#else
  #define Heap_Size                    0x0400
#endif

LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region
  VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
    * (.isr_vector,+FIRST)
  }
  ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
    * (InRoot$$Sections)
    .ANY (+RO)
  }

  RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
    .ANY (+RW +ZI)
  }
  ARM_LIB_HEAP +0 EMPTY Heap_Size {    ; Heap region growing up
  }
  ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
  }
}

LR_m_usb_bdt m_usb_sram_start usb_bdt_size {
  ER_m_usb_bdt m_usb_sram_start UNINIT usb_bdt_size {
    * (*m_usb_bdt)
  }
}

LR_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
  ER_m_usb_ram (m_usb_sram_start + usb_bdt_size) UNINIT (m_usb_sram_size - usb_bdt_size) {
    * (*m_usb_global)
  }
}
&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;But i got errors while compiling.&lt;/P&gt;&lt;P&gt;This is Error:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;debug\AIRHMI_NXP_7_INCH_1v0.axf: Error: L6630E: Invalid token start expected number or ( but found S at position 3 on line 12
debug\AIRHMI_NXP_7_INCH_1v0.axf: Error: L6629E: Unmatched parentheses expecting ) but found S at position 3 on line 12
debug\AIRHMI_NXP_7_INCH_1v0.axf: Error: L6226E: Missing base address for region *.
C:\Users\omera\AppData\Local\Temp\p5248-3(12): error: L6292E: Ignoring unknown attribute 'SDRAM_Data' specified for region *.
C:\Users\omera\AppData\Local\Temp\p5248-3(12): error: L6228E: Expected '{', found ')...'.
C:\Users\omera\AppData\Local\Temp\p5248-3(12): error: L6228E: Expected '}', found 'EOF'.
Not enough information to list image symbols.
Not enough information to list load addresses in the image map.
Finished: 2 information, 0 warning and 6 error messages.
"debug\AIRHMI_NXP_7_INCH_1v0.axf" - 6 Error(s), 0 Warning(s).
Target not created.
Build Time Elapsed:  00:00:01&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Wed, 09 Feb 2022 06:21:37 GMT</pubDate>
    <dc:creator>omeraygor</dc:creator>
    <dc:date>2022-02-09T06:21:37Z</dc:date>
    <item>
      <title>LPC54607 Run functions into sdram</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54607-Run-functions-into-sdram/m-p/1410712#M47859</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;My problem is about MCU flash size. Flash size is not enough for me. So want to some of fonctions put into sdram.&lt;/P&gt;&lt;P&gt;in the document,&amp;nbsp;&lt;A href="https://www.nxp.com/docs/en/application-note/AN12423.pdf" target="_blank"&gt;https://www.nxp.com/docs/en/application-note/AN12423.pdf&lt;/A&gt;&lt;/P&gt;&lt;P&gt;There is memory allocation section , i saw something like that ;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;#define m_sdram_start 0xA0000000
#define m_sdram_size 0x80000
LR_m_sdram_text m_sdram_start m_sdram_size {
*(SDRAM_Data)
*(SDRAM_Function)
core_list_join.o
core_matrix.o
core_state.o
core_util.o
} &lt;/LI-CODE&gt;&lt;P&gt;This is part of linker file.&amp;nbsp;&lt;/P&gt;&lt;P&gt;what does it mean? So core_list_join.o located sdram and others into flash?&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;i added this into linker file. My fille is;&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;#!armclang --target=arm-arm-none-eabi -mcpu=cortex-m4 -E -x c
/*
** ###################################################################
**     Processors:          LPC54607J256BD208
**                          LPC54607J256ET180
**
**     Compiler:            Keil ARM C/C++ Compiler
**     Reference manual:    LPC546xx User manual Rev.1.9  5 June 2017
**     Version:             rev. 1.2, 2017-06-08
**     Build:               b190923
**
**     Abstract:
**         Linker file for the Keil ARM C/C++ Compiler
**
**     Copyright 2016 Freescale Semiconductor, Inc.
**     Copyright 2016-2019 NXP
**     All rights reserved.
**
**     SPDX-License-Identifier: BSD-3-Clause
**
**     http:                 www.nxp.com
**     mail:                 support@nxp.com
**
** ###################################################################
*/


; normal flashdan çalisma.
#define m_interrupts_start             0x00000000
#define m_interrupts_size              0x00000400

#define m_text_start                   0x00000400
#define m_text_size                    0x0003FC00

#define m_data_start                   0x20000000
#define m_data_size                    0x00018000

#define m_usb_sram_start               0x40100000
#define m_usb_sram_size                0x00002000

#define m_sdram_start 				   0xA0000000
#define m_sdram_size 				   0x80000
LR_m_sdram_text m_sdram_start m_sdram_size {
*(SDRAM_Data)
*(SDRAM_Function)
core_list_join.o
core_matrix.o
core_state.o
core_util.o
} 

/* USB BDT size */
#define usb_bdt_size                   0x0
/* Sizes */
#if (defined(__stack_size__))
  #define Stack_Size                   __stack_size__
#else
  #define Stack_Size                   0x0400
#endif

#if (defined(__heap_size__))
  #define Heap_Size                    __heap_size__
#else
  #define Heap_Size                    0x0400
#endif

LR_m_text m_interrupts_start m_text_start+m_text_size-m_interrupts_start { ; load region size_region
  VECTOR_ROM m_interrupts_start m_interrupts_size { ; load address = execution address
    * (.isr_vector,+FIRST)
  }
  ER_m_text m_text_start FIXED m_text_size { ; load address = execution address
    * (InRoot$$Sections)
    .ANY (+RO)
  }

  RW_m_data m_data_start m_data_size-Stack_Size-Heap_Size { ; RW data
    .ANY (+RW +ZI)
  }
  ARM_LIB_HEAP +0 EMPTY Heap_Size {    ; Heap region growing up
  }
  ARM_LIB_STACK m_data_start+m_data_size EMPTY -Stack_Size { ; Stack region growing down
  }
}

LR_m_usb_bdt m_usb_sram_start usb_bdt_size {
  ER_m_usb_bdt m_usb_sram_start UNINIT usb_bdt_size {
    * (*m_usb_bdt)
  }
}

LR_m_usb_ram (m_usb_sram_start + usb_bdt_size) (m_usb_sram_size - usb_bdt_size) {
  ER_m_usb_ram (m_usb_sram_start + usb_bdt_size) UNINIT (m_usb_sram_size - usb_bdt_size) {
    * (*m_usb_global)
  }
}
&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;But i got errors while compiling.&lt;/P&gt;&lt;P&gt;This is Error:&lt;/P&gt;&lt;LI-CODE lang="markup"&gt;debug\AIRHMI_NXP_7_INCH_1v0.axf: Error: L6630E: Invalid token start expected number or ( but found S at position 3 on line 12
debug\AIRHMI_NXP_7_INCH_1v0.axf: Error: L6629E: Unmatched parentheses expecting ) but found S at position 3 on line 12
debug\AIRHMI_NXP_7_INCH_1v0.axf: Error: L6226E: Missing base address for region *.
C:\Users\omera\AppData\Local\Temp\p5248-3(12): error: L6292E: Ignoring unknown attribute 'SDRAM_Data' specified for region *.
C:\Users\omera\AppData\Local\Temp\p5248-3(12): error: L6228E: Expected '{', found ')...'.
C:\Users\omera\AppData\Local\Temp\p5248-3(12): error: L6228E: Expected '}', found 'EOF'.
Not enough information to list image symbols.
Not enough information to list load addresses in the image map.
Finished: 2 information, 0 warning and 6 error messages.
"debug\AIRHMI_NXP_7_INCH_1v0.axf" - 6 Error(s), 0 Warning(s).
Target not created.
Build Time Elapsed:  00:00:01&lt;/LI-CODE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 09 Feb 2022 06:21:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54607-Run-functions-into-sdram/m-p/1410712#M47859</guid>
      <dc:creator>omeraygor</dc:creator>
      <dc:date>2022-02-09T06:21:37Z</dc:date>
    </item>
    <item>
      <title>Re: LPC54607 Run functions into sdram</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54607-Run-functions-into-sdram/m-p/1410758#M47860</link>
      <description>&lt;P&gt;Hi, Omer,&lt;/P&gt;
&lt;P&gt;As you know that the SRRAM is volatile memory, after power off, the data/code in SDRAM will disappear.&lt;/P&gt;
&lt;P&gt;You have to save code/data in on-chip flash or external flash, if you extend external flash for example spi flash or parallel flash accessed by EMC, it is okay. For example, you can compile a function as data array and save them in external spi flash, after power-on, copy them to on-chip SRAM or SDRAM, then execute.&lt;/P&gt;
&lt;P&gt;You can change another LPC processor with large on-chip flash.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Hope it can help you&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
      <pubDate>Wed, 09 Feb 2022 07:44:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54607-Run-functions-into-sdram/m-p/1410758#M47860</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2022-02-09T07:44:39Z</dc:date>
    </item>
    <item>
      <title>Re: LPC54607 Run functions into sdram</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54607-Run-functions-into-sdram/m-p/1410763#M47861</link>
      <description>&lt;P&gt;&lt;EM&gt;&amp;gt; My problem is about MCU flash size. Flash size is not enough for me. So want to some of fonctions put into sdram.&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;For a MCU like the LPC546xx, RAM is hardly a solution for overflowing Flash.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Any code to be executed from RAM is copied at runtime from Flash first. You could use external Flash, like QSPI Flash. Or a MCU variant with larger Flash instead.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;But for a MCU with limited RAM like Cortex M devices, code execution from RAM most often used for IAP code. Most of this MCUs have only one Flash bank, which cannot execute code while erasing/writing any sector in that bank is ongoing.&lt;/SPAN&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 09 Feb 2022 07:49:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54607-Run-functions-into-sdram/m-p/1410763#M47861</guid>
      <dc:creator>frank_m</dc:creator>
      <dc:date>2022-02-09T07:49:00Z</dc:date>
    </item>
    <item>
      <title>Re: LPC54607 Run functions into sdram</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54607-Run-functions-into-sdram/m-p/1411070#M47867</link>
      <description>&lt;P&gt;Hi again,&lt;/P&gt;&lt;P&gt;i wrote a bootloader, it can be coppy code from external flash to sdram. then execute code from there. But executing from sdram is very slower.&lt;/P&gt;&lt;P&gt;so i want to that bootloader copy some of code sdram and main code is in the flash another location.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Can CPU do that?&amp;nbsp;&lt;/P&gt;&lt;P&gt;a part of code in the sdram execute and main code inside flash memory?&lt;/P&gt;</description>
      <pubDate>Wed, 09 Feb 2022 14:35:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54607-Run-functions-into-sdram/m-p/1411070#M47867</guid>
      <dc:creator>omeraygor</dc:creator>
      <dc:date>2022-02-09T14:35:11Z</dc:date>
    </item>
    <item>
      <title>Re: LPC54607 Run functions into sdram</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54607-Run-functions-into-sdram/m-p/1411484#M47871</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;Regarding your question that you copy code from SDRAM to another location of flash, I suppose the so-called flash is on-chip flash, we provide IAP function which can program on-chip flash.&lt;/P&gt;
&lt;P&gt;For detailed inf, pls refer to Chapter 5: LPC546xx ISP and IAP in UM10912.pdf, the SDK also provides the IAP example code.&lt;/P&gt;
&lt;P&gt;Hope it can help you&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
      <pubDate>Thu, 10 Feb 2022 02:58:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54607-Run-functions-into-sdram/m-p/1411484#M47871</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2022-02-10T02:58:17Z</dc:date>
    </item>
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