topic Re: LPC55xx ADC interrupt routine in LPC Microcontrollers

LPC55xx ADC interrupt routine

ianbenton — Wed, 08 Dec 2021 15:41:15 GMT

Would I be correct in thinking that the interrupt routine should clear STAT[TCOMP_INT] ?

Without doing so the interrupt routine runs continuously. I don't see any statement to that effect in the manual.

Re: LPC55xx ADC interrupt routine

Alice_Yang — Thu, 09 Dec 2021 09:27:57 GMT

Hello,

STAT[TCOMP_INT] is for trigger interrupt flag, not ADC result ready interrupt flag.

If you want to use ADC trigger interrupt, yes, you need write 1 to clear it.

About read ADC data interrupt function, please refer to ADC interrupt demo under SDK.

Strongly recommend you debug and run the ADC demo first.

Thanks.

Alice

Re: LPC55xx ADC interrupt routine

frank_m — Thu, 09 Dec 2021 10:54:43 GMT

I would suppose any set interrupt flag would cause a continuous interrupt execution. The only difference is, certain flags like result ready get reset automatically on reading the result register.

I use to start out with an interrupt handler that clears all enabled interrupt flags regardless of their status.

Re: LPC55xx ADC interrupt routine

ianbenton — Thu, 09 Dec 2021 19:07:32 GMT

When the SDK creates a project, it creates over 60,000 lines of code. I have searched for ADC0_IRQHandler in most of the logical places it could possibly be, but can't find it.

Re: LPC55xx ADC interrupt routine

Alice_Yang — Mon, 13 Dec 2021 05:04:14 GMT

Hello,

For example lpadc_interrupt demo:

Alice

Re: LPC55xx ADC interrupt routine

danielholala — Thu, 15 Jan 2026 19:32:45 GMT

Hello,

That was helpful, even 5 years later.

I'm using multiple ADC channels on the LPC55xx. The ADC FIFO is read out when the ADC interrupt fires. I'm using the FIFO watermark interrupt (FWMIE0). Regarding interrupt status bits, I do not have to reset any flags in the ADC status register as they (e.g., RDY0) apparently get reset automatically as soon as the FIFO has been read out completely.

Today I changed the code from FWMIE0 to Trigger completion interrupt ("TCOMP_IE") and my ISR ran continously, as you observed. So to fix this, after reading out FIFO, I have to clear TCOMP_INT bit in the ADC status register by writing a 1 to this bit:

ADC0->STAT &= 1U << ADC_STAT_TCOMP_INT_SHIFT;

I wish NXP would put more effort, time and people to work on the documentation. I'm glad we have this community here.

Thanks
Daniel

Re: LPC55xx ADC interrupt routine

danielholala — Tue, 10 Mar 2026 09:21:22 GMT

I figured that the &= operator is probably incorrect. To clear a bit in the ADC status register, you write a 1 to this bit. This should be done using simple assignment:

ADC0->STAT = 1U << ADC_STAT_TCOMP_INT_SHIFT;

Reference: MCUXpresso SDK LPADC_ClearStatusFlags()