topic LPC1817 SPI Clock delay issue in LPC Microcontrollers https://community.nxp.com/t5/LPC-Microcontrollers/LPC1817-SPI-Clock-delay-issue/m-p/1333117#M46360 <P>I got SPI clock issue in SPI 8 bits mode. Does anyone know any configuration for reducing delay of clock ? I would like to make clock continuously. Thanks.</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="chase_lin_2-1630487025869.png" style="width: 747px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/154777iBA574C0A0C6E1456/image-dimensions/747x393?v=v2" width="747" height="393" role="button" title="chase_lin_2-1630487025869.png" alt="chase_lin_2-1630487025869.png" /></span></P><P>&nbsp;</P><LI-SPOILER>SPI<BR /><BR /><BR /></LI-SPOILER><P>&nbsp;</P> Wed, 01 Sep 2021 09:38:43 GMT chase_lin 2021-09-01T09:38:43Z LPC1817 SPI Clock delay issue https://community.nxp.com/t5/LPC-Microcontrollers/LPC1817-SPI-Clock-delay-issue/m-p/1333117#M46360 <P>I got SPI clock issue in SPI 8 bits mode. Does anyone know any configuration for reducing delay of clock ? I would like to make clock continuously. Thanks.</P><P><span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="chase_lin_2-1630487025869.png" style="width: 747px;"><img src="https://community.nxp.com/t5/image/serverpage/image-id/154777iBA574C0A0C6E1456/image-dimensions/747x393?v=v2" width="747" height="393" role="button" title="chase_lin_2-1630487025869.png" alt="chase_lin_2-1630487025869.png" /></span></P><P>&nbsp;</P><LI-SPOILER>SPI<BR /><BR /><BR /></LI-SPOILER><P>&nbsp;</P> Wed, 01 Sep 2021 09:38:43 GMT https://community.nxp.com/t5/LPC-Microcontrollers/LPC1817-SPI-Clock-delay-issue/m-p/1333117#M46360 chase_lin 2021-09-01T09:38:43Z Re: LPC1817 SPI Clock delay issue https://community.nxp.com/t5/LPC-Microcontrollers/LPC1817-SPI-Clock-delay-issue/m-p/1334273#M46385 <P>Hi,</P> <P>Unfortunately, there is no register for configuring delay between transfers. Is SSEL pin kept low between transfers? Please not that if you are using SPI format with CPOL=0,CPHA=0 requires SSEL set to 1 between transfers in continuous transmission.</P> <P>Best regards,</P> <P>Felipe</P> Thu, 02 Sep 2021 17:31:45 GMT https://community.nxp.com/t5/LPC-Microcontrollers/LPC1817-SPI-Clock-delay-issue/m-p/1334273#M46385 FelipeGarcia 2021-09-02T17:31:45Z