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    <title>LPC MicrocontrollersのトピックRe: LPC11C24 IAP Flash Over CAN Hard Fault in Sector 0</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-IAP-Flash-Over-CAN-Hard-Fault-in-Sector-0/m-p/1304409#M45795</link>
    <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;I suggest you disable all interrupt, and erase/program sector 7 with your constant data and check if it is okay. After the flash operation is complete, you can enable interrupt and run your other code.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
    <pubDate>Thu, 08 Jul 2021 03:29:49 GMT</pubDate>
    <dc:creator>xiangjun_rong</dc:creator>
    <dc:date>2021-07-08T03:29:49Z</dc:date>
    <item>
      <title>LPC11C24 IAP Flash Over CAN Hard Fault in Sector 0</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-IAP-Flash-Over-CAN-Hard-Fault-in-Sector-0/m-p/1299868#M45686</link>
      <description>&lt;P&gt;&lt;STRONG&gt;Context:&amp;nbsp;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;Currently I have a client application that sends CAN messages where 4 bytes of 8 bytes of data contain the HEX value of a new FW I would like to flash. In brief words, i'm sending 4 bytes of the new firmware over CAN, one message at a time, the LPC11C24 firmware keeps track of 256 byte segments and only then invoke this series of IAP commands in order:&lt;BR /&gt;&lt;BR /&gt;1. Prepare Sector For Write Operation&lt;BR /&gt;2. Copy Ram To Flash&amp;nbsp;&lt;BR /&gt;3. Compare&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Problem:&lt;/STRONG&gt;In IAR Embedded Workbench IDE i can see the Flash addresses I specify update with the received data but this only seem to work with some sectors. I tried flashing in sector 0 or even 1 and i get hard faults.&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;I have been stuck on this issue for weeks and would appreciate just about any recommendation. Thank you !&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;</description>
      <pubDate>Tue, 29 Jun 2021 17:38:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-IAP-Flash-Over-CAN-Hard-Fault-in-Sector-0/m-p/1299868#M45686</guid>
      <dc:creator>chrisfernam</dc:creator>
      <dc:date>2021-06-29T17:38:32Z</dc:date>
    </item>
    <item>
      <title>Re: LPC11C24 IAP Flash Over CAN Hard Fault in Sector 0</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-IAP-Flash-Over-CAN-Hard-Fault-in-Sector-0/m-p/1300083#M45688</link>
      <description>&lt;P&gt;Hi, Christian,&lt;/P&gt;
&lt;P&gt;Pls refer to section 26.4.7 in UM10398.pdf, when you use IAP to erase/program flash, you have to disable all interrupt or put both the interrupt vector and ISR in SRAM.&lt;/P&gt;
&lt;P&gt;26.4.7 Interrupts during IAP&lt;BR /&gt;The on-chip flash memory is not accessible during erase/write operations. When the user&lt;BR /&gt;application code starts executing the interrupt vectors from the user flash area are active.&lt;BR /&gt;Before making any IAP call, either disable the interrupts or ensure that the user interrupt&lt;BR /&gt;vectors are active in RAM and that the interrupt handlers reside in RAM. The IAP code&lt;BR /&gt;does not use or disable interrupts.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Hope it can help you&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XIangJun Rong&lt;/P&gt;</description>
      <pubDate>Wed, 30 Jun 2021 04:28:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-IAP-Flash-Over-CAN-Hard-Fault-in-Sector-0/m-p/1300083#M45688</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2021-06-30T04:28:35Z</dc:date>
    </item>
    <item>
      <title>Re: LPC11C24 IAP Flash Over CAN Hard Fault in Sector 0</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-IAP-Flash-Over-CAN-Hard-Fault-in-Sector-0/m-p/1300743#M45698</link>
      <description>&lt;P&gt;Thanks for the swift response Xiangjun.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regarding 1st recommendation of ensuring to disable the interrupts before making any IAP call; I am currently doing this; please see the implementation below:&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;IAP iap_entry;&lt;BR /&gt;iap_entry = (IAP)IAP_LOCATION;&lt;BR /&gt;uint32_t IAP_Command[5] = {0, 0, 0, 0, 0};&lt;BR /&gt;uint32_t IAP_Result[4] = {0, 0, 0, 0};&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;IAPCommands iap_command_to_execute = PREPARE_SECTOR_FOR_WRITE_OPERATION;&lt;BR /&gt;IAP_Command[0] = iap_command_to_execute;&lt;BR /&gt;IAP_Command[1] = SECTOR;&lt;BR /&gt;IAP_Command[2] = SECTOR;&lt;/P&gt;&lt;P&gt;__disable_irq();&lt;BR /&gt;iap_entry(IAP_Command, IAP_Result);&lt;BR /&gt;__enable_irq();&lt;/P&gt;&lt;P&gt;if(IAP_Result[0] != CMD_SUCCESS)&lt;BR /&gt;{&lt;BR /&gt;return FALSE;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;iap_command_to_execute = COPY_RAM_TO_FLASH;&lt;BR /&gt;IAP_Command[0] = iap_command_to_execute;&lt;BR /&gt;IAP_Command[1] = (uint32_t)(SECTOR_ADDR + (BLOCK_NUM * FLASH_BUFFER_SIZE)); //(Offset % 256)&lt;BR /&gt;IAP_Command[2] = (uint32_t)buffer;&lt;BR /&gt;IAP_Command[3] = FLASH_BUFFER_SIZE;&lt;BR /&gt;IAP_Command[4] = CPU_CLK;&lt;/P&gt;&lt;P&gt;__disable_irq();&lt;BR /&gt;iap_entry(IAP_Command, IAP_Result);&lt;BR /&gt;__enable_irq();&lt;/P&gt;&lt;P&gt;if(IAP_Result[0] != CMD_SUCCESS)&lt;BR /&gt;{&lt;BR /&gt;return FALSE;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;iap_command_to_execute = COMPARE;&lt;BR /&gt;IAP_Command[0] = iap_command_to_execute;&lt;BR /&gt;IAP_Command[1] = (uint32_t)(SECTOR_ADDR + (BLOCK_NUM * FLASH_BUFFER_SIZE));&lt;BR /&gt;IAP_Command[2] = (uint32_t)buffer;&lt;BR /&gt;IAP_Command[3] = FLASH_BUFFER_SIZE;&lt;/P&gt;&lt;P&gt;__disable_irq();&lt;BR /&gt;iap_entry(IAP_Command, IAP_Result);&lt;BR /&gt;__enable_irq();&lt;/P&gt;&lt;P&gt;if(IAP_Result[0] != CMD_SUCCESS)&lt;BR /&gt;{&lt;BR /&gt;return FALSE;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;However, I have not tried the 2nd recommendation of &lt;STRONG&gt;ensuring both the interrupt vectors and the interrupt handlers are active in RAM. could you please shed some light as to how this may be verified, or accomplished?&lt;/STRONG&gt; In IAR Workbench IDE, as I step through code I can see control executes from RAM addresses, but right after I erase sector 0 or 1 i can see control just navigate to some empty address which consequentially its when hard fault occurs.&amp;nbsp;&lt;BR /&gt;&lt;BR /&gt;Thank you.&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Wed, 30 Jun 2021 23:40:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-IAP-Flash-Over-CAN-Hard-Fault-in-Sector-0/m-p/1300743#M45698</guid>
      <dc:creator>chrisfernam</dc:creator>
      <dc:date>2021-06-30T23:40:11Z</dc:date>
    </item>
    <item>
      <title>Re: LPC11C24 IAP Flash Over CAN Hard Fault in Sector 0</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-IAP-Flash-Over-CAN-Hard-Fault-in-Sector-0/m-p/1300770#M45699</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;If you disable all interrupt before calling IAP function, it is okay.&lt;/P&gt;
&lt;P&gt;Regarding the flash address, pls check your application code map, and know total sectors the application code and constant data occupies, you can erase/program the sectors the application code/constant data do NOT occupy, otherwise, there is overlap, which will leads to hard-fault.&lt;/P&gt;
&lt;P&gt;BTW, pls note that you have to erase the sector with api function before you program it.&lt;/P&gt;
&lt;P&gt;Hope it can help you&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
      <pubDate>Thu, 01 Jul 2021 00:35:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-IAP-Flash-Over-CAN-Hard-Fault-in-Sector-0/m-p/1300770#M45699</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2021-07-01T00:35:59Z</dc:date>
    </item>
    <item>
      <title>Re: LPC11C24 IAP Flash Over CAN Hard Fault in Sector 0</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-IAP-Flash-Over-CAN-Hard-Fault-in-Sector-0/m-p/1304088#M45789</link>
      <description>&lt;P&gt;Hi Xiangjun thank you very much for the recommendations. Since this is my first time learning to program such a chip, there are some terms I have been researching due to my unfamiliarity such as the application's code map. I looked into this inherited project's linkermap.icf&amp;nbsp;&lt;STRONG&gt;(see below in bold),&amp;nbsp;&lt;/STRONG&gt;can you confirm if this is what you're referring to as application code map?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;It seems this config file assigns 32kB for flash, and 8kB for RAM storage. Indeed the application faults when flashing on top of sectors 0-3 which contain the currently running process. So what is your suggestion? Write to upper sectors (4-7), and then in one action copy those sectors to 0-3 and only then enable interrupts again?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Your help is greatly appreciated.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;/*-Specials-*/&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;define symbol __ICFEDIT_intvec_start__ = 0x00000000;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;/*-Memory Regions-*/&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;/* Note that the CAN functions need to be reserved */&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;define symbol __ICFEDIT_region_ROM_start__ = 0x00000000; //flash?&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;define symbol __ICFEDIT_region_ROM_end__ = 0x00008000;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;define symbol __ICFEDIT_region_RAM_start__ = 0x10000000;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;define symbol __ICFEDIT_region_RAM_end__ = 0x10002000;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;/*-Sizes-*/&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;define symbol __ICFEDIT_size_cstack__ = 0x400;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;define symbol __ICFEDIT_size_heap__ = 0x400;&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;/**** End of ICF editor section. ###ICF###*/&lt;/STRONG&gt;&lt;/P&gt;</description>
      <pubDate>Wed, 07 Jul 2021 15:26:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-IAP-Flash-Over-CAN-Hard-Fault-in-Sector-0/m-p/1304088#M45789</guid>
      <dc:creator>chrisfernam</dc:creator>
      <dc:date>2021-07-07T15:26:00Z</dc:date>
    </item>
    <item>
      <title>Re: LPC11C24 IAP Flash Over CAN Hard Fault in Sector 0</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-IAP-Flash-Over-CAN-Hard-Fault-in-Sector-0/m-p/1304409#M45795</link>
      <description>&lt;P&gt;Hi,&lt;/P&gt;
&lt;P&gt;I suggest you disable all interrupt, and erase/program sector 7 with your constant data and check if it is okay. After the flash operation is complete, you can enable interrupt and run your other code.&lt;/P&gt;
&lt;P&gt;BR&lt;/P&gt;
&lt;P&gt;XiangJun Rong&lt;/P&gt;</description>
      <pubDate>Thu, 08 Jul 2021 03:29:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC11C24-IAP-Flash-Over-CAN-Hard-Fault-in-Sector-0/m-p/1304409#M45795</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2021-07-08T03:29:49Z</dc:date>
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