topic Re: Setting of DEBUG_LOCK_EN on LPC55S69 in LPC Microcontrollers

Setting of DEBUG_LOCK_EN on LPC55S69

__marvin__ — Mon, 14 Jun 2021 08:38:18 GMT

Hi,

I would like to disable the debug- as well as the programming- (SWD) interfaces on our custom LPC55S69 board in order to secure our IP.

While reading the DEBUG_FEATURES and DEBUG_FEATURES_DP returns as expected, reading DEBUG_LOCK_EN resulted in 0x5, which means all write accesses to the debug and programming registers are permitted and ignored.

I was wondering, where the write lock is set to 0x5 in the examples. I couldn't find the line.

Hope you can help me with this.

Thanks for your help and all the best,
marvin

Re: Setting of DEBUG_LOCK_EN on LPC55S69

FelipeGarcia — Thu, 17 Jun 2021 16:51:39 GMT

Hi Marvin,

So you would like to set 0xA to the register? This means that you enable write access to security registers.

I also read value when starting a new project and I also read 0x5 value. I am going to contact internal team to see if they have some feedback about this.

Best regards,

Felipe

Re: Setting of DEBUG_LOCK_EN on LPC55S69

__marvin__ — Thu, 17 Jun 2021 20:23:55 GMT

Hi Felipe,

thanks for verifying this.
If there should be a response, please let me know.

All the best,
marvin

Re: Setting of DEBUG_LOCK_EN on LPC55S69

FelipeGarcia — Mon, 21 Jun 2021 21:56:30 GMT

Hi Marvin,

I have received confirmation from internal team. Please check it below.

After POR, the related six registers (CPU0_DEBUG_FEATURES,CPU1_DEBUG_FEATURES…) will be configured based on the PFR data in the CFPA DCFG_CC_SOCU_NS_PIN and DCFG_CC_SOCU_NS_DFLT (0x9de20 – 0x9de27), and CMPA DCFG_CC_SOCU_PIN and DCFG_CC_SOCU_DFLT (0x9e410 – 0x9e41b), and then the ROM will set DEBUG_LOCK_EN to 0x5.

You can refer to AN13037(LPC55Sxx Debug Authentication) for details.

Best regards,

Felipe

Re: Setting of DEBUG_LOCK_EN on LPC55S69

__marvin__ — Tue, 22 Jun 2021 16:03:01 GMT

Thank you so much! This really helped me a lot.