LPC Microcontrollers中的主题 LPC55S69 TrustZone

LPC55S69 TrustZone

kentseng — Thu, 29 Apr 2021 02:38:21 GMT

Hi All :

I’m trying to use the non-Secure SysTick Timer in Non-Secure project of trustzone example “Hello World” from SDK_2.9.0_LPCXpresso55s69 (MCUXpresso IDE project) with my LPCXpresso55s69 board.

The System Tick Configuration (non-secure) “TZ_SysTick_Config_NS” runs successfully in non-secure world. (hello_world_ns.c )

After trustzone example “Hello World” runs completely, nothing happened to the Handler function “SysTick_Handler” which added in non-sercure world. (hello_world_ns.c )

The same result presented if I try to copy and add another vector table initialization e.g., “g_pfnVectors_ns” in starup code for secure & non-secure project (~\lpcxpresso55s69_hello_world_s\startup\startup_lpc55s69_cm33_core0.c & ~\lpcxpresso55s69_hello_world_ns\startup\startup_lpc55s69_cm33_core0.c )

The Non-secure vector base address specify to start address of non-secure world in secure project. ( hello_world_s.c )

/* Set non-secure vector table */

SCB_NS->VTOR = NON_SECURE_START;

As we know, there are three system tick timers (SysTick timer) are present in the LPC55S69. Two inside the CPU0 (Secured and Non-Secured), and one inside the CPU1 (Non-Secured).

How can I use non-Secure SysTick Timer for my non-Secure application in non-Secure world?

Ref :

“The vector base address is banked between Secure and Non-secure state. VTOR_S contains the Secure vector base address, and VTOR_NS contains the Non-secure vector base address. These registers can be programmed by software, and also initialized at reset by the system” ( https://developer.arm.com/documentation/100230/0002/functional-description/programmers-model/exceptions/exception-handling-and-prioritization )
“two system tick timers in CPU0 in lpc55s69” https://community.nxp.com/t5/LPC-Microcontrollers/two-system-tick-timers-in-CPU0-in-lpc55s69/m-p/1001461
“The system supports two separate interrupt vector tables for secure and non-secure code execution. This interrupt assignment is controlled during Secure state code execution via the NVIC (nested vector interrupt controller).” ( https://www.keil.com/pack/doc/CMSIS/Core/html/using_TrustZone_pg.html )

Re: LPC55S69 TrustZone

xiangjun_rong — Fri, 30 Apr 2021 02:57:30 GMT

Hi, TZU,

I attach an simple documentation, pls refer to it.

XiangJun Rong

Re: LPC55S69 TrustZone

kentseng — Tue, 04 May 2021 01:52:43 GMT

Dear Sir :

Thanks for your documentation for MRT0 module interrupt example in Non-secure world. ( GeneratingInterruptInNon-securityMode.pdf )
I’ll exercise it for Device specific interrupts with Positive IRQn values.

By the way, the SysTick Timer uses dedicated exception vector : processor core exceptions which with negative IRQn values. e.g., Exception 15: System Tick Interrupt. SysTick_IRQn = -1

After check the NVIC functions, nothing what I found to initial NVIC module if the processor core exceptions which with negative IRQn values.

Do you have any idea for processor core exceptions which with negative IRQn values in Non-secure world ?

Thanks!

Ref : https://www.keil.com/pack/doc/CMSIS/Core/html/group__NVIC__gr.html

Re: LPC55S69 TrustZone

xiangjun_rong — Thu, 06 May 2021 03:12:15 GMT

Hi,

Pls refer to the following figure which defines the priority of SysTick module, I copy it from the Cortex-M4 user manual.

Hope it can help you

XiangJun Rong