LPC MicrocontrollersのトピックLPC546xx Flexcomm maximum clock frequency

LPC546xx Flexcomm maximum clock frequency

NoahPendleton_Markforged — Thu, 08 Apr 2021 23:49:30 GMT

Hello-

The LPC546xx manual has this note about Flexcomm clock selection:

(Section 24.4 of UM10912 Rev 2.4)

Remark: The Flexcomm Interface function clock frequency should not be higher than
48 MHz.

We've experimented with selecting a 96MHz Audio PLL clock output for the Flexcomm interface; with a 16x oversample setting, this lets us use the maximum 6Mbaud speed for the USART (and seems to be working properly).

Is this configuration supported? Can a 96MHz clock be selected for the Flexcomm peripherals?

Thanks!

Re: LPC546xx Flexcomm maximum clock frequency

xiangjun_rong — Fri, 09 Apr 2021 03:30:31 GMT

Hi, Noah,

I think it is a general guide line for the Flexcomm interface, as you use USART module, pls refer to the section 7.17.8.4 USART in data sheet of LPC546xx. which can be downloaded from

https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc54000-cortex-m4-/power-efficient-microcontrollers-mcus-with-advanced-peripherals-based-on-arm-cortex-m4-core:LPC546XX?tab=Documentation_Tab

As it says that the bit rate can reach up to 6.25M in asynchronous mode, the USART driving clock will be 16*6.25M=100M.

Hope it can help you

XiangJun Rong

Re: LPC546xx Flexcomm maximum clock frequency

dlaw2 — Fri, 09 Apr 2021 11:55:30 GMT

Are you certain that the Remark about 48 MHz can be ignored? If it is incorrect, then why is it written in the user manual?

Please note that it is possible to obtain a USART speed of 6.25M with a flexcomm clock of 48 MHz or less by setting a lower value of the OSR register.

Re: LPC546xx Flexcomm maximum clock frequency

xiangjun_rong — Tue, 13 Apr 2021 02:55:39 GMT

Hi, Noah,

I agree with you that reducing the oversampling from 16 bits can reduce the required uart driving clock frequency.

baud rate = [FCLK / oversample rate] / BRG divide

The BRG is USART Baud Rate Generator register,is a clock divider.

I have consulted with AE engineer, we think that the Remark about 48 MHz clock limitation is correct, you should follow up the clock limitation.

Hope it can help you

Xiangjun rong

Re: LPC546xx Flexcomm maximum clock frequency

dlaw2 — Tue, 13 Apr 2021 12:16:41 GMT

Thank you for looking into this. It would be really nice to have a definite reply from someone who knows the reason for the limitation, instead of "I think it can be ignored" followed by "we think it is correct". The flexcomm peripheral works fine with a 96 MHz clock from all of our testing.

Re: LPC546xx Flexcomm maximum clock frequency

xiangjun_rong — Wed, 14 Apr 2021 03:12:10 GMT

Hi,

Anyway, I have asked the AE team what the 48MHz limitation means exactly, I will update the thread after I get reply.

XiangJun Rong

Re: LPC546xx Flexcomm maximum clock frequency

xiangjun_rong — Thu, 15 Apr 2021 05:42:04 GMT

Hi, all,

This is AE team reply:

"We need to follow UM, the maximum limit clock is 48M, this is due to design limitation."

Xiangjun Rong

Re: LPC546xx Flexcomm maximum clock frequency

NoahPendleton_Markforged — Thu, 15 Apr 2021 12:40:20 GMT

Hi Xiangjun-

Thanks for checking, much appreciated! We'll use 48MHz as the input clock to the Flexcomm.

Thanks!
Noah