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    <title>topic [solved]UART message detection using CTI Interrupt in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/solved-UART-message-detection-using-CTI-Interrupt/m-p/521781#M4417</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by crudo on Tue May 14 11:59:36 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;P&gt;Hello.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;I am trying use the UART CTI Interruption to detect if a message has been received.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;I set the FIFO Trigger level to 8 bytes. So, when a message of length less than 8 bytes is received the CTI Interrut is generated, so all fine here. When a non-8bytes-multiple message is received (e.g.: 18 bytes) all fine too: one RDA Interrrupt with 8 bytes, another RDA Interrrupt with 8 bytes and one CTI interrupt with 2 bytes. The issue is when a 8bytes-multiple message is received. In this last case all interrupts received are RDA, because this fit right with FIFO length.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;My question is if there is any way to workaround this feature of LPC, and always receive a CTI interrupt when 3.5 character timeout has reached.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;Ricardo.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 16:38:29 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T16:38:29Z</dc:date>
    <item>
      <title>[solved]UART message detection using CTI Interrupt</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/solved-UART-message-detection-using-CTI-Interrupt/m-p/521781#M4417</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by crudo on Tue May 14 11:59:36 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;P&gt;Hello.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;I am trying use the UART CTI Interruption to detect if a message has been received.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;I set the FIFO Trigger level to 8 bytes. So, when a message of length less than 8 bytes is received the CTI Interrut is generated, so all fine here. When a non-8bytes-multiple message is received (e.g.: 18 bytes) all fine too: one RDA Interrrupt with 8 bytes, another RDA Interrrupt with 8 bytes and one CTI interrupt with 2 bytes. The issue is when a 8bytes-multiple message is received. In this last case all interrupts received are RDA, because this fit right with FIFO length.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;My question is if there is any way to workaround this feature of LPC, and always receive a CTI interrupt when 3.5 character timeout has reached.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;Ricardo.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 16:38:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/solved-UART-message-detection-using-CTI-Interrupt/m-p/521781#M4417</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T16:38:29Z</dc:date>
    </item>
    <item>
      <title>Re: [solved]UART message detection using CTI Interrupt</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/solved-UART-message-detection-using-CTI-Interrupt/m-p/521782#M4418</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by crudo on Tue May 14 13:50:57 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;P&gt;I found a simple solution: just leave a byte on FIFO. &amp;nbsp; :)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 16:38:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/solved-UART-message-detection-using-CTI-Interrupt/m-p/521782#M4418</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T16:38:30Z</dc:date>
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