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  <channel>
    <title>topic LPC5528 SRAM3 hardfault in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1185969#M42937</link>
    <description>&lt;P&gt;I am trying to write some data for SRAM 3 region, which locates at&amp;nbsp;&lt;SPAN class="fontstyle0"&gt;0x2003 0000 accroding to User manual.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;But this results in hardFault. Any other regions of SRAM work properly.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;Here is example of my code: &lt;/SPAN&gt;&lt;/P&gt;&lt;DIV class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Аннотация 2020-11-19 135616.jpg" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130503iE47D8D8BDF12C122/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Аннотация 2020-11-19 135616.jpg" alt="Аннотация 2020-11-19 135616.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Stack, data and heap placed in SRAM 0, so, region 3 should be free.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Аннотация 2020-11-19 135907.jpg" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130505iCF534911A2E7EAA3/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Аннотация 2020-11-19 135907.jpg" alt="Аннотация 2020-11-19 135907.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt; &lt;/P&gt;&lt;P&gt; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;</description>
    <pubDate>Thu, 19 Nov 2020 11:00:38 GMT</pubDate>
    <dc:creator>alex__</dc:creator>
    <dc:date>2020-11-19T11:00:38Z</dc:date>
    <item>
      <title>LPC5528 SRAM3 hardfault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1185969#M42937</link>
      <description>&lt;P&gt;I am trying to write some data for SRAM 3 region, which locates at&amp;nbsp;&lt;SPAN class="fontstyle0"&gt;0x2003 0000 accroding to User manual.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;But this results in hardFault. Any other regions of SRAM work properly.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="fontstyle0"&gt;Here is example of my code: &lt;/SPAN&gt;&lt;/P&gt;&lt;DIV class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Аннотация 2020-11-19 135616.jpg" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130503iE47D8D8BDF12C122/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Аннотация 2020-11-19 135616.jpg" alt="Аннотация 2020-11-19 135616.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;Stack, data and heap placed in SRAM 0, so, region 3 should be free.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Аннотация 2020-11-19 135907.jpg" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130505iCF534911A2E7EAA3/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Аннотация 2020-11-19 135907.jpg" alt="Аннотация 2020-11-19 135907.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt; &lt;/P&gt;&lt;P&gt; &lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;DIV class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;&lt;DIV class="mceNonEditable lia-copypaste-placeholder"&gt;&amp;nbsp;&lt;/DIV&gt;</description>
      <pubDate>Thu, 19 Nov 2020 11:00:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1185969#M42937</guid>
      <dc:creator>alex__</dc:creator>
      <dc:date>2020-11-19T11:00:38Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5528 SRAM3 hardfault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1186364#M42949</link>
      <description>&lt;P&gt;Hello Alex,&lt;/P&gt;
&lt;P&gt;Have you define the SRAM3 space in memory detail:&lt;/P&gt;
&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="2020-11-20_11-15-10.jpg" style="width: 999px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130568iACBDC66D74C405CE/image-size/large?v=v2&amp;amp;px=999" role="button" title="2020-11-20_11-15-10.jpg" alt="2020-11-20_11-15-10.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Alice&lt;/P&gt;</description>
      <pubDate>Fri, 20 Nov 2020 03:16:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1186364#M42949</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2020-11-20T03:16:49Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5528 SRAM3 hardfault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1186623#M42962</link>
      <description>&lt;P&gt;At default configuration there is no SRAM3 (RAM from&amp;nbsp;&lt;SPAN class="fontstyle0"&gt;0x2000 0000 to 0x2003 0000 is SRAM 0,1,2 in user manual).&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="alex___0-1605865205585.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130623i993A23B0A19C6089/image-size/medium?v=v2&amp;amp;px=400" role="button" title="alex___0-1605865205585.png" alt="alex___0-1605865205585.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;I have added SRAM3 by increasing size:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Аннотация 2020-11-20 130003.jpg" style="width: 497px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/130625i67692AD0709D64AE/image-size/large?v=v2&amp;amp;px=999" role="button" title="Аннотация 2020-11-20 130003.jpg" alt="Аннотация 2020-11-20 130003.jpg" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;But nothing changes.&lt;/P&gt;</description>
      <pubDate>Fri, 20 Nov 2020 10:02:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1186623#M42962</guid>
      <dc:creator>alex__</dc:creator>
      <dc:date>2020-11-20T10:02:42Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5528 SRAM3 hardfault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1187913#M43006</link>
      <description>&lt;P&gt;Hello Alex,&lt;/P&gt;
&lt;P&gt;Please share your whole project, I will help to check it on my side, thanks.&lt;/P&gt;
&lt;P&gt;&amp;nbsp;&lt;/P&gt;
&lt;P&gt;Regards,&lt;/P&gt;
&lt;P&gt;Alice&lt;/P&gt;</description>
      <pubDate>Tue, 24 Nov 2020 06:38:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1187913#M43006</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2020-11-24T06:38:30Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5528 SRAM3 hardfault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1189051#M43041</link>
      <description>&lt;P&gt;Hello Alice, here it is.&lt;/P&gt;&lt;P&gt;Code with SRAM3, where MCU is hardfaulting, located at the beginning of the main().&lt;/P&gt;</description>
      <pubDate>Wed, 25 Nov 2020 14:47:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1189051#M43041</guid>
      <dc:creator>alex__</dc:creator>
      <dc:date>2020-11-25T14:47:02Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5528 SRAM3 hardfault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1189062#M43042</link>
      <description>&lt;P&gt;According to the data sheet, LPC55S28 does not have SRAM3 (which is probably why it was missing in the original project setup).&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;LPC55S28 is a device with total ram of 256k, and such devices do not have SRAM3. See attached screenshots from the data sheet and user manual.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Screenshot 2020-11-25 at 14.59.39.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/131010iAD31312EDB3E1FE1/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Screenshot 2020-11-25 at 14.59.39.png" alt="Screenshot 2020-11-25 at 14.59.39.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="Screenshot 2020-11-25 at 15.00.27.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/131011iBEF5F1731CA79893/image-size/medium?v=v2&amp;amp;px=400" role="button" title="Screenshot 2020-11-25 at 15.00.27.png" alt="Screenshot 2020-11-25 at 15.00.27.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;  &lt;/P&gt;</description>
      <pubDate>Wed, 25 Nov 2020 15:03:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1189062#M43042</guid>
      <dc:creator>converse</dc:creator>
      <dc:date>2020-11-25T15:03:22Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5528 SRAM3 hardfault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1189076#M43043</link>
      <description>&lt;P&gt;Yeah, I think you are right. I just thought that usb-ram and ram-x is not included into 256k size.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;</description>
      <pubDate>Wed, 25 Nov 2020 15:26:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1189076#M43043</guid>
      <dc:creator>alex__</dc:creator>
      <dc:date>2020-11-25T15:26:28Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5528 SRAM3 hardfault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1189078#M43044</link>
      <description>&lt;P&gt;Alice, I think that this issue is resolved and you don't need to check my project.&lt;/P&gt;&lt;P&gt;Thank you.&lt;/P&gt;</description>
      <pubDate>Wed, 25 Nov 2020 15:27:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1189078#M43044</guid>
      <dc:creator>alex__</dc:creator>
      <dc:date>2020-11-25T15:27:49Z</dc:date>
    </item>
    <item>
      <title>Re: LPC5528 SRAM3 hardfault</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1189481#M43051</link>
      <description>&lt;P&gt;OK, thanks!&lt;/P&gt;</description>
      <pubDate>Thu, 26 Nov 2020 06:44:22 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC5528-SRAM3-hardfault/m-p/1189481#M43051</guid>
      <dc:creator>Alice_Yang</dc:creator>
      <dc:date>2020-11-26T06:44:22Z</dc:date>
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