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    <title>topic Re: LPC55S69 :  USB0 and USB1 sharing USBRAM ? in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-USB0-and-USB1-sharing-USBRAM/m-p/1174360#M42724</link>
    <description>&lt;P&gt;Thank you for the info, i'll definitively check what you did&lt;/P&gt;&lt;P&gt;At the moment i've split the ram in 2,&amp;nbsp; one part for usb0 , one part for usb1&lt;/P&gt;&lt;P&gt;i dont know if this is correct, seems to sort of work&lt;/P&gt;&lt;P class="lia-align-center"&gt;Patch attached&lt;/P&gt;</description>
    <pubDate>Wed, 28 Oct 2020 08:20:29 GMT</pubDate>
    <dc:creator>trescurieux</dc:creator>
    <dc:date>2020-10-28T08:20:29Z</dc:date>
    <item>
      <title>LPC55S69 :  USB0 and USB1 sharing USBRAM ?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-USB0-and-USB1-sharing-USBRAM/m-p/1160470#M42418</link>
      <description>&lt;P&gt;Hi&lt;/P&gt;&lt;P&gt;I've seen some issues when using USB0 as host and USB1 as device at the same time&lt;/P&gt;&lt;P&gt;USB0 (host) is using OHCI driver&lt;/P&gt;&lt;P&gt;USB1 (device) is using&amp;nbsp;kUSB_ControllerIp3516Hs0, it seems to work when used alone (?)&lt;/P&gt;&lt;P&gt;The main issue seems to be that both tries to use the shared ram at the same address&lt;/P&gt;&lt;P&gt;so the setup of USB1 breaks usb0&lt;/P&gt;&lt;P&gt;i.e.&lt;/P&gt;&lt;P&gt;For usb0 :&amp;nbsp;FSL_FEATURE_USBFSH_USB_RAM_BASE_ADDRESS (0x40100000)&lt;/P&gt;&lt;P&gt;For usb1:&amp;nbsp;FSL_FEATURE_USBHSD_USB_RAM_BASE_ADDRESS&amp;nbsp; 0x40100000)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;It is probably a misconfiguration/mistunderstanding from my part,.&lt;/P&gt;&lt;P&gt;Any pointers would be appreciated&lt;/P&gt;&lt;P&gt;Thank you in advance&lt;/P&gt;&lt;P&gt;Tres&lt;/P&gt;</description>
      <pubDate>Tue, 29 Sep 2020 07:21:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-USB0-and-USB1-sharing-USBRAM/m-p/1160470#M42418</guid>
      <dc:creator>trescurieux</dc:creator>
      <dc:date>2020-09-29T07:21:15Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 :  USB0 and USB1 sharing USBRAM ?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-USB0-and-USB1-sharing-USBRAM/m-p/1170483#M42644</link>
      <description>&lt;PRE&gt;I have noticed the exact same problem which leads to memory corruption of the OHCI USB stack. I found a race condition in the device driver when the hardware received a SETUP token while&amp;nbsp;USB_DeviceLpc3511IpSetDefaultState() is in progress. The HW store the setup packet (8 bytes) at&amp;nbsp;&lt;SPAN&gt;0x40100000. You can find more details here:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A href="https://community.nxp.com/t5/LPC-Microcontrollers/LPC54608-SDK-2-4-1-keyboard2mouse-example-always-goes-into-hard/m-p/833199#M33259" target="_blank" rel="noopener"&gt;https://community.nxp.com/t5/LPC-Microcontrollers/LPC54608-SDK-2-4-1-keyboard2mouse-example-always-goes-into-hard/m-p/833199#M33259&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;My solution is to modify the device driver to remove the race condition. it is posted in my first post in a zip file.&lt;BR /&gt;This is for LPC54xxx family, but your MCU USB software interface (UM11126's figure 161) is identical to mine, so the solution should work.&lt;/SPAN&gt;&lt;/PRE&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Tue, 20 Oct 2020 17:49:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-USB0-and-USB1-sharing-USBRAM/m-p/1170483#M42644</guid>
      <dc:creator>belmontbob59</dc:creator>
      <dc:date>2020-10-20T17:49:51Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 :  USB0 and USB1 sharing USBRAM ?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-USB0-and-USB1-sharing-USBRAM/m-p/1174360#M42724</link>
      <description>&lt;P&gt;Thank you for the info, i'll definitively check what you did&lt;/P&gt;&lt;P&gt;At the moment i've split the ram in 2,&amp;nbsp; one part for usb0 , one part for usb1&lt;/P&gt;&lt;P&gt;i dont know if this is correct, seems to sort of work&lt;/P&gt;&lt;P class="lia-align-center"&gt;Patch attached&lt;/P&gt;</description>
      <pubDate>Wed, 28 Oct 2020 08:20:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-USB0-and-USB1-sharing-USBRAM/m-p/1174360#M42724</guid>
      <dc:creator>trescurieux</dc:creator>
      <dc:date>2020-10-28T08:20:29Z</dc:date>
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