<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: LPC54628J5 – 8 flash access cycles at 220 MHz causes occasional garbage read in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54628J5-8-flash-access-cycles-at-220-MHz-causes-occasional/m-p/1168468#M42571</link>
    <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/178280"&gt;@bergem&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;I've done some tests and I'm unable to reproduce this issue. Would be possible to share a code where I can reproduce this in the Evaluation Board?&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Alexis Andalon&lt;/P&gt;</description>
    <pubDate>Thu, 15 Oct 2020 23:57:46 GMT</pubDate>
    <dc:creator>Alexis_A</dc:creator>
    <dc:date>2020-10-15T23:57:46Z</dc:date>
    <item>
      <title>LPC54628J5 – 8 flash access cycles at 220 MHz causes occasional garbage read</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54628J5-8-flash-access-cycles-at-220-MHz-causes-occasional/m-p/1156907#M42336</link>
      <description>&lt;P&gt;The user manual states (UM10912 rev 2.4, page 126):&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P class="lia-indent-padding-left-30px"&gt;&lt;SPAN&gt;8 system clocks flash access time (for &lt;/SPAN&gt;&lt;SPAN&gt;system clock rates up &lt;/SPAN&gt;&lt;SPAN&gt;to 168 MHz and for &lt;/SPAN&gt;&lt;SPAN&gt;system clock rates 180 MHz &amp;lt; CCLK &lt;/SPAN&gt;&lt;SPAN&gt;&amp;lt;=&lt;/SPAN&gt;&lt;SPAN&gt; 220 MHz).&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="lia-indent-padding-left-30px"&gt;&lt;SPAN&gt;&lt;SPAN&gt;9 system clocks flash access time (for&lt;/SPAN&gt;&lt;SPAN&gt; system clock rates up to 180 MHz).&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P class="lia-indent-padding-left-30px"&gt;&lt;SPAN&gt;At 220 MHz &lt;/SPAN&gt;&lt;SPAN&gt;the system clock/access time can be lower when &lt;/SPAN&gt;&lt;SPAN&gt;compared to 180 MHz because the power library &lt;/SPAN&gt;&lt;SPAN&gt;optimizes the on-chip voltage regulator.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Running with 9 cycles at 220 MHz works without issues, but when decreasing to 8 cycles I have problems with occasional garbage data when reading from flash resulting in hard-to-debug crashes. I've tried both using a 25 MHz external oscillator and the FRO 12 Mhz and the issue remains. I'm using the MCUxpresso config tool to generate the clock setup code.&lt;/P&gt;</description>
      <pubDate>Tue, 22 Sep 2020 12:25:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54628J5-8-flash-access-cycles-at-220-MHz-causes-occasional/m-p/1156907#M42336</guid>
      <dc:creator>bergem</dc:creator>
      <dc:date>2020-09-22T12:25:04Z</dc:date>
    </item>
    <item>
      <title>Re: LPC54628J5 – 8 flash access cycles at 220 MHz causes occasional garbage read</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54628J5-8-flash-access-cycles-at-220-MHz-causes-occasional/m-p/1159552#M42404</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/178280"&gt;@bergem&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;That is strange since in the&amp;nbsp;BOARD_BootClockPLL220M this is set automatically depending on the frequency used, I did some test with this and could reproduce this behavior. Can you let me know which SDK versión are you using and how are you modifying this register?&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Alexis Andalon&lt;/P&gt;</description>
      <pubDate>Sat, 26 Sep 2020 00:10:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54628J5-8-flash-access-cycles-at-220-MHz-causes-occasional/m-p/1159552#M42404</guid>
      <dc:creator>Alexis_A</dc:creator>
      <dc:date>2020-09-26T00:10:14Z</dc:date>
    </item>
    <item>
      <title>Re: LPC54628J5 – 8 flash access cycles at 220 MHz causes occasional garbage read</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54628J5-8-flash-access-cycles-at-220-MHz-causes-occasional/m-p/1160520#M42420</link>
      <description>&lt;P&gt;I was using 2.7.0 before and it was working. When I upgraded to 2.8.0 I started getting weird crashes. After some debugging, I noticed that CLOCK_SetFLASHAccessCyclesForFreq() had been updated.&lt;/P&gt;&lt;P&gt;In 2.7.0 it calls CLOCK_SetFLASHAccessCycles(kCLOCK_Flash9Cycle) at 220 MHz, while in 2.8.0 it calls CLOCK_SetFLASHAccessCycles(kCLOCK_Flash8Cycle).&lt;/P&gt;&lt;P&gt;By modifying BOARD_BootClockPLL220M() to call CLOCK_SetFLASHAccessCycles() instead of CLOCK_SetFLASHAccessCyclesForFreq() I force it to use kCLOCK_Flash9Cycle which solves the problem on 2.8.0.&lt;/P&gt;</description>
      <pubDate>Tue, 29 Sep 2020 08:13:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54628J5-8-flash-access-cycles-at-220-MHz-causes-occasional/m-p/1160520#M42420</guid>
      <dc:creator>bergem</dc:creator>
      <dc:date>2020-09-29T08:13:51Z</dc:date>
    </item>
    <item>
      <title>Re: LPC54628J5 – 8 flash access cycles at 220 MHz causes occasional garbage read</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54628J5-8-flash-access-cycles-at-220-MHz-causes-occasional/m-p/1161436#M42438</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/178280"&gt;@bergem&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;The latest SDK is the 2.8.2, this has the same API as 2.8.0 but could have changes in the powerlib. Could you try using the latest SDK?&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Alexis Andalon&lt;/P&gt;</description>
      <pubDate>Wed, 30 Sep 2020 16:13:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54628J5-8-flash-access-cycles-at-220-MHz-causes-occasional/m-p/1161436#M42438</guid>
      <dc:creator>Alexis_A</dc:creator>
      <dc:date>2020-09-30T16:13:36Z</dc:date>
    </item>
    <item>
      <title>Re: LPC54628J5 – 8 flash access cycles at 220 MHz causes occasional garbage read</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54628J5-8-flash-access-cycles-at-220-MHz-causes-occasional/m-p/1161657#M42443</link>
      <description>&lt;P&gt;I've tried 2.8.2 and the problem is still there.&lt;/P&gt;</description>
      <pubDate>Thu, 01 Oct 2020 07:25:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54628J5-8-flash-access-cycles-at-220-MHz-causes-occasional/m-p/1161657#M42443</guid>
      <dc:creator>bergem</dc:creator>
      <dc:date>2020-10-01T07:25:01Z</dc:date>
    </item>
    <item>
      <title>Re: LPC54628J5 – 8 flash access cycles at 220 MHz causes occasional garbage read</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54628J5-8-flash-access-cycles-at-220-MHz-causes-occasional/m-p/1168468#M42571</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/178280"&gt;@bergem&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;I've done some tests and I'm unable to reproduce this issue. Would be possible to share a code where I can reproduce this in the Evaluation Board?&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Alexis Andalon&lt;/P&gt;</description>
      <pubDate>Thu, 15 Oct 2020 23:57:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54628J5-8-flash-access-cycles-at-220-MHz-causes-occasional/m-p/1168468#M42571</guid>
      <dc:creator>Alexis_A</dc:creator>
      <dc:date>2020-10-15T23:57:46Z</dc:date>
    </item>
  </channel>
</rss>

