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    <title>topic eMMC always setting busy bit in cmd1 response in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/eMMC-always-setting-busy-bit-in-cmd1-response/m-p/1161734#M42445</link>
    <description>&lt;P&gt;Hi we're using a&amp;nbsp;LPC54608 with an external sandisk (sdinbda6-64g) eMMC memory device which is failing to complete the initialisation phase. (using sdk 2.7.0)&lt;/P&gt;&lt;P&gt;Having looked at the clk, cmd and d0 lines on the scope I can see the processor is sending cmd0 to put it into idle state then is in a constant loop sending cmd1 with the reply always showing bit 31 of OCR as busy (0).&lt;/P&gt;&lt;P&gt;The eMMC part is connected to 3V3 for VCC and VCCQ at 1V8 with power rails measured at 3.32 and 1.81&lt;/P&gt;&lt;P&gt;Is there anything on the nxp processor side that can stop the init phase?&amp;nbsp; Or any extra debug that can be turned on?&lt;/P&gt;&lt;P&gt;Kind regards&lt;/P&gt;&lt;P&gt;Ian&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
    <pubDate>Thu, 01 Oct 2020 10:15:42 GMT</pubDate>
    <dc:creator>iann</dc:creator>
    <dc:date>2020-10-01T10:15:42Z</dc:date>
    <item>
      <title>eMMC always setting busy bit in cmd1 response</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/eMMC-always-setting-busy-bit-in-cmd1-response/m-p/1161734#M42445</link>
      <description>&lt;P&gt;Hi we're using a&amp;nbsp;LPC54608 with an external sandisk (sdinbda6-64g) eMMC memory device which is failing to complete the initialisation phase. (using sdk 2.7.0)&lt;/P&gt;&lt;P&gt;Having looked at the clk, cmd and d0 lines on the scope I can see the processor is sending cmd0 to put it into idle state then is in a constant loop sending cmd1 with the reply always showing bit 31 of OCR as busy (0).&lt;/P&gt;&lt;P&gt;The eMMC part is connected to 3V3 for VCC and VCCQ at 1V8 with power rails measured at 3.32 and 1.81&lt;/P&gt;&lt;P&gt;Is there anything on the nxp processor side that can stop the init phase?&amp;nbsp; Or any extra debug that can be turned on?&lt;/P&gt;&lt;P&gt;Kind regards&lt;/P&gt;&lt;P&gt;Ian&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;</description>
      <pubDate>Thu, 01 Oct 2020 10:15:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/eMMC-always-setting-busy-bit-in-cmd1-response/m-p/1161734#M42445</guid>
      <dc:creator>iann</dc:creator>
      <dc:date>2020-10-01T10:15:42Z</dc:date>
    </item>
    <item>
      <title>Re: eMMC always setting busy bit in cmd1 response</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/eMMC-always-setting-busy-bit-in-cmd1-response/m-p/1163158#M42470</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/125359"&gt;@iann&lt;/a&gt;&amp;nbsp;,&lt;/P&gt;&lt;P&gt;Are you using a custom board or a development board? If you're using a custom, could you try replicating this in one of our development boards?&lt;/P&gt;&lt;P&gt;Are you using an SDK example to test this?&lt;/P&gt;&lt;P&gt;Also, the latest SDK available is 2.8.0. so I suggest updating it.&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Alexis Andalon&lt;/P&gt;</description>
      <pubDate>Tue, 06 Oct 2020 00:19:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/eMMC-always-setting-busy-bit-in-cmd1-response/m-p/1163158#M42470</guid>
      <dc:creator>Alexis_A</dc:creator>
      <dc:date>2020-10-06T00:19:28Z</dc:date>
    </item>
    <item>
      <title>Re: eMMC always setting busy bit in cmd1 response</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/eMMC-always-setting-busy-bit-in-cmd1-response/m-p/1163442#M42475</link>
      <description>&lt;P&gt;Hi Alexis,&lt;/P&gt;&lt;P&gt;Thanks for getting back to me, this is on a custom board. A previous prototype board worked with a different eMMC chip from ISSI, that board also had quite different power up characteristics for the Core VCC and the I/O VCCQ which we're currently investigating.&lt;/P&gt;&lt;P&gt;I've looked at the latest sdk changes and can see there's a change to the cmd 1 retries which I've implemented in our version. I was using the mmc example as a test.&lt;/P&gt;&lt;P&gt;Is there a way the sdk driver can be changed to issue another cmd 0 after the cmd 1 number of retries has been reached so it will try again after issuing a reset(cmd0) ?&lt;/P&gt;&lt;P&gt;Cheers&lt;/P&gt;&lt;P&gt;Ian&lt;/P&gt;</description>
      <pubDate>Tue, 06 Oct 2020 13:55:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/eMMC-always-setting-busy-bit-in-cmd1-response/m-p/1163442#M42475</guid>
      <dc:creator>iann</dc:creator>
      <dc:date>2020-10-06T13:55:16Z</dc:date>
    </item>
    <item>
      <title>Re: eMMC always setting busy bit in cmd1 response</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/eMMC-always-setting-busy-bit-in-cmd1-response/m-p/1171337#M42664</link>
      <description>&lt;P&gt;Hello&amp;nbsp;&lt;a href="https://community.nxp.com/t5/user/viewprofilepage/user-id/125359"&gt;@iann&lt;/a&gt;,&lt;/P&gt;
&lt;P&gt;What you could do is to modify the MMC_SendOperationCondition to include the&amp;nbsp;MMC_GoIdle that will call the CMD0 again.&lt;/P&gt;
&lt;P&gt;Best Regards,&lt;/P&gt;
&lt;P&gt;Alexis Andalon&lt;/P&gt;</description>
      <pubDate>Wed, 21 Oct 2020 22:33:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/eMMC-always-setting-busy-bit-in-cmd1-response/m-p/1171337#M42664</guid>
      <dc:creator>Alexis_A</dc:creator>
      <dc:date>2020-10-21T22:33:12Z</dc:date>
    </item>
    <item>
      <title>Re: eMMC always setting busy bit in cmd1 response</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/eMMC-always-setting-busy-bit-in-cmd1-response/m-p/1196415#M43201</link>
      <description>&lt;P&gt;To close this off.&lt;/P&gt;&lt;P&gt;In the end we had to change the emmc part to an ISSI one which has now come up first time with no problem.&lt;/P&gt;&lt;P&gt;Below is the start up sequence showing the&amp;nbsp;&lt;SPAN&gt;handshaking to up gears through the clock speeds.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper lia-image-align-inline" image-alt="init from 2nd batch.png" style="width: 400px;"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/132242iB69262A7F5AE1972/image-size/medium?v=v2&amp;amp;px=400" role="button" title="init from 2nd batch.png" alt="init from 2nd batch.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;The SanDisk part had a line in the hardware design manual that it needed the I/O and core voltage in a sequence outside of the normal jedec spec.&lt;/P&gt;</description>
      <pubDate>Wed, 09 Dec 2020 12:59:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/eMMC-always-setting-busy-bit-in-cmd1-response/m-p/1196415#M43201</guid>
      <dc:creator>iann</dc:creator>
      <dc:date>2020-12-09T12:59:49Z</dc:date>
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