topic Re: NMI interrupt in LPC Microcontrollers

NMI interrupt

TEMCEFF — Tue, 14 Apr 2020 11:04:21 GMT

Can any help me, how to configure watchdog as NMI interrupt. Whenever my code went into hardfault, watchdog unable to reset it. Hardfault has -1 interrupt priority and NMI has -2 interrupt priority.

Thanks and Regards,

Muralidhar.

Re: NMI interrupt

ErichStyger — Tue, 14 Apr 2020 13:12:15 GMT

I don't understand the need for this?

What device are you using (but think this applies to any Cortex-M anyway?)?

If the watchdog is not kicked, it will cause a reset, and reset has a priority of -3 which is even lower than NMI (-2) and Hardfault (-1), see ARM Cortex-M, Interrupts and FreeRTOS: Part 1 | MCU on Eclipse

I can say that at least on the Kinetis implementation I'm always able to get out of a hard fault with the watchdog?

I hope this helps,

Erich

Re: NMI interrupt

TEMCEFF — Tue, 14 Apr 2020 14:30:24 GMT

If your program went to hardfault handler, your watch dog doesn't work because hardfault has highest priority than watchdog. If we configured watchdog as NMI we can reset the processor even though it is in hardfault handler.

I'm using LPC1769 controller.

Re: NMI interrupt

ErichStyger — Tue, 14 Apr 2020 14:42:49 GMT

Are you sure? This is certainly true if you rely on the Watchdog interrupt. But the watchdog itself will drive reset which has the highest priority. I can confirm this at least for other Cortex-M (I don't know for the LPC1769).

Re: NMI interrupt

TEMCEFF — Tue, 14 Apr 2020 22:56:15 GMT

I'm sure. LPC1769 is Cortex-M3 series controller.