LPC1769 SPI with CMSIS RTOS V2

graham_thomas — Thu, 09 Jul 2020 18:55:12 GMT

Hi, I'm trying to get SPI working on the LPC1769 using the CMSIS RTOS v2, and am having some issues.

I'm trying to send a 16-bit address (0x7FFE) over the MOSI line to query a register in a peripheral (code is attached). I set up the SPI pins in the RTOS configuration wizard as shown below:

The SSEL and SCK pins are outputting pulses correctly, but I'm getting nothing from the MOSI pin. And looking at the values set in the PINSEL0 register after initializing, the pins appear to be set to the correct SPI functions. Is there something I'm forgetting?

Re: LPC1769 SPI with CMSIS RTOS V2

xiangjun_rong — Fri, 10 Jul 2020 04:10:39 GMT

Hi, Graham,

I suppose that your code has issue:

while (1)       //main loop
{
           SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_ACTIVE); //SS active
           SPIdrv->Send(&testdata_out, sizeof(testdata_out));           //Send data
           osThreadFlagsWait(0x01, NULL, osWaitForever);
           SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_INACTIVE);   //SS inactive

           SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_ACTIVE);       //SS active
           SPIdrv->Receive(&testdata_in, 1);                                                   //Receive data
           osThreadFlagsWait(0x01, NULL, osWaitForever);
           SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_INACTIVE); //SS inactive
   }

Because you do not post the low level driver of SPI, I suppose that you set up the /SS pin as GPIO mode, SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_ACTIVE) function clears the GPIO, SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_INACTIVE) function set the GPIO.

I think setting/clearing the GPIO is okay.

But as you know that the SPI is a synchronous mode, in other words, when the transmitter has completed the transfer, the receiver has received the data at the same time.

so you code seems to be:

             SPIdrv->Receive(&testdata_in, 1); ////Rong modified
           SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_INACTIVE);   //SS inactive
            //deleting the following code
            //SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_ACTIVE);       //SS active
           // SPIdrv->Receive(&testdata_in, 1);                                                   //Receive data
           // osThreadFlagsWait(0x01, NULL, osWaitForever);
            //SPIdrv->Control(ARM_SPI_CONTROL_SS, ARM_SPI_SS_INACTIVE); //SS inactive
   }

BTW, pls follow up the procedure to in initialize the SSP:

The two SSP interfaces, SSP0 and SSP1 are configured using the following registers:
1. Power: In the PCONP register (Table 46), set bit PCSSP0 to enable SSP0 and bit
PCSSP1 to enable SSP1.
Remark: On reset, both SSP interfaces are enabled (PCSSP0/1 = 1).
2. Clock: In PCLKSEL0 select PCLK_SSP1; in PCLKSEL1 select PCLK_SSP0 (see
Section 4.7.3. In master mode, the clock must be scaled down (see Section 18.6.5).
3. Pins: Select the SSP pins through the PINSEL registers (Section 8.5) and pin modes
through the PINMODE registers (Section 8.4).
4. Interrupts: Interrupts are enabled in the SSP0IMSC register for SSP0 and SSP1IMSC
register for SSP1 Table 376. Interrupts are enabled in the NVIC using the appropriate
Interrupt Set Enable register, see Table 50.
5. Initialization: There are two control registers for each of the SSP ports to be
configured: SSP0CR0 and SSP0CR1 for SSP0, SSP1CR0 and SSP1CR1 for SSP1.
See Section 18.6.1 and Section 18.6.2.
6. DMA: The Rx and Tx FIFOs of the SSP interfaces can be connected to the GPDMA
controller (see Section 18.6.10). For GPDMA system connections, see Table 544.
Remark: SSP0 is intended to be used as an alternative for the SPI interface, which is
included as a legacy peripheral. Only one of these peripherals can be used at the any one
time.
Hope it can help you

XiangJun Rong

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LPC1769 SPI with CMSIS RTOS V2

Re: LPC1769 SPI with CMSIS RTOS V2