LPC MicrocontrollersのトピックRe: LPC55S69 : USB_SRAM peripheral or memory ?

LPC55S69 : USB_SRAM peripheral or memory ?

EugeneHiihtaja — Thu, 28 May 2020 08:51:27 GMT

Hi !

In UM 2.1.7 USB_SRAM counted as peripheral device.

Can this area is used as regular R/W memory without any limitation ?

Can I set in MPU attributes for it as for regular memory :

tskMPU_REGION_READ_WRITE | tskMPU_REGION_EXECUTE_NEVER

or like device : tskMPU_REGION_DEVICE_MEMORY

Does USB_SRAM have some limitations or special usage ?

I can see over reboot it is always wiped to 0x00 and do not retains at all ?

This is becouse it is peripheral and it resetted somehow or BootRom just cleaned it some how ?

Can it be used as area what is cleaned due reset in any case ?

Regards,

Eugene

Re: LPC55S69 : USB_SRAM peripheral or memory ?

EugeneHiihtaja — Mon, 01 Jun 2020 16:08:14 GMT

Just one more addition.

I pass uint32_t * ptr via nsc call from nonsecure side to secure.

but if I print value *ptr it is always show 0 if this pointer point to USB_SRAM.

If It normal SRAM , everything is OK. and it show real value in area what is pointer point to.

No Hardfault, Memaligh fault. Just return 0 on Secure side.

Nonsecure SRAM area is provisioned in Secure MPU with user privileges for be able to have access to it from Secure side.

I'm not quite understand what is difference between normal SRAM and USB_SRAM in this case or overall.

Regards,

Eugene

Re: LPC55S69 : USB_SRAM peripheral or memory ?

diego_charles — Mon, 01 Jun 2020 17:42:19 GMT

Hi Eugene,

I'm working on your questions,

please, provide me additional time to present my feedback.

Regards,

Re: LPC55S69 : USB_SRAM peripheral or memory ?

EugeneHiihtaja — Tue, 02 Jun 2020 06:20:18 GMT

Hi Diego !

One more issue is not known for USB_SRAM also.

Whole memory area is zeroized over reboot.

And it is not provisioned in linker memory map e.g it is not software effect.

It can be cleaned in BootRom due automatic ISP peripheral scan or becouse it is special memory.

Do you know reason ?

Regards,

Eugene

Re: LPC55S69 : USB_SRAM peripheral or memory ?

diego_charles — Wed, 03 Jun 2020 00:30:16 GMT

Hi Eugene,

1 Regarding your last question I have some results to show:

I powered my board (with the LPC55S69 rev1B) and flashed my code.

After that, when the USB RAM was gated:

CLOCK_EnableClock(kCLOCK_UsbRam1);

I find out random values , they are expected after a power up.

Moving on, I decided to initialize the USB RAM with values different that zero.

   CLOCK_EnableClock(kCLOCK_UsbRam1);
//this loop will write from 0x40100000(USB RAM base address ) to 0x40103FCC
    for (int i = 0; i < (FSL_FEATURE_USB_USB_RAM/4); i++)
    {
        ((uint32_t *)FSL_FEATURE_USB_USB_RAM_BASE_ADDRESS)[i] = 0x0EU;
    }

Then, I confirmed the success on this :smileyhappy:

Finally , I noticed that after a sotfware reset, the USB RAM retained my initialization. This may suggest that the USB RAM is not initialized by the MCU or by startup code, as you mention. Even after I flashed another project the USB RAM retained my previous initialization.

I hope this helps!

Regarding the other questions:

The user manual indicates that is possible to use the USB RAM as a generic memory when no USB interface is being used.

I'll check if there is a recommendation on how to define the USB RAM using FreeRTOS MPU drivers.

Regards,

Diego.

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Re: LPC55S69 : USB_SRAM peripheral or memory ?

EugeneHiihtaja — Wed, 03 Jun 2020 06:44:24 GMT

Hi ie709758@iteso.mx‌ !

Thank you ! I get your point.

Clock for USB_SRAM is not mentioned anywhere.

Looks like ConfigTool add it to clock tree only when entire USB is enabled.

I can see USB_SRAM can retain in PowerDown mode if need.

But looks like Bootrom is not enable clock by default and context might be lost over reboot.

Is this so ?

Regards,

Eugene

Re: LPC55S69 : USB_SRAM peripheral or memory ?

diego_charles — Sat, 06 Jun 2020 05:22:25 GMT

Hi Eugene,

Regarding the other questions:

Can I set in MPU attributes for it as for regular memory ?

Although the USB_SRAM is located on the Peripheral space on the LPC55S69, you can define its attributes as a normal memory, since you are going to you are going to read and write data you will do it on a normal SRAM area.

Only as reference, the ARMv8-M Memory Protection Unit on chapter 5 Memory type definitions in ARMv8-M provides an overview of the Device and Normal memories. Device memories are intended for protection of peripheral control registers and they do not support several optimizations made for Normal memories.

But looks like Bootrom is not enable clock by default and context might be lost over reboot.
Is this so ?

I have noticed that the initialization on USB_SRAM, that I showed previously, only was lost only after a power cycle,

I still recommend you confirm this on your side.

Can this area is used as regular R/W memory without any limitation ?

As long you are not implementing USB drivers on the MCU, the USB_SRAM can be used as a general purpose memory.

If you want to implement this memory with the MPU you will need to check ARM recommendations like:The smallest size that can be programmed for an MPU region is 32 bytes. or The smallest size that can be programmed for an MPU region is 32 bytes.

I hope this information helps,

Best regards,

Diego

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Re: LPC55S69 : USB_SRAM peripheral or memory ?

EugeneHiihtaja — Sun, 07 Jun 2020 19:11:10 GMT

Hi diego.charles‌ !

Romcode migh use USB for ISP programming. And it might be so that it initialize it during scan when look active peripheral.

It might be sudden feature if USB_SRAM retain over reboot.

I can see romcode leave some clocks attached to some peripherals and some clock like USB is enabled.

Even it is expected that all unused peripherals/clocks should be disabled.

Is any clear guide exists what explains state of all peripherals at point when executuion jump from bootrom ?

Regards,

Eugene

Re: LPC55S69 : USB_SRAM peripheral or memory ?

diego_charles — Fri, 12 Jun 2020 18:07:36 GMT

Hi Eugene,

I apologize for the delay,

Using MCuxpresso, you can switch the debugger breakpoint from main to ResetISR. Then open the peripheral view of the Syscon ->AHBCLKCTRLx registers to check their clock status.

For example, AHBCLKCTRL2 ,we can see that the USB_SRAM is dissabled at the beggining of the application .

Best regards,

Diego.