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    <title>LPC MicrocontrollersのトピックRe: ADR instruction</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/ADR-instruction/m-p/1071416#M41309</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Maybe there was a bug introduced in GCC (or maybe it was a bug fix?). Did you try v11.1.1?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However, t&lt;SPAN style="color: #242729; background-color: #ffffff;"&gt;he official ARM manual says that the "LDR Rn,=value" pseudo-instruction will be automatically replaced by the fastest and least memory &lt;SPAN&gt;consuming instruction(s) that will load the value into Rn. So, you probably want to replace you ADR's with&amp;nbsp;LDR&lt;SPAN style="background-color: #ffffff;"&gt;&amp;nbsp;Rn, [PC, #208] (or whatever is&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN style="caret-color: #242729; color: #242729; "&gt;appropriate in your code).&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 14 Jul 2020 13:36:34 GMT</pubDate>
    <dc:creator>converse</dc:creator>
    <dc:date>2020-07-14T13:36:34Z</dc:date>
    <item>
      <title>ADR instruction</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/ADR-instruction/m-p/1071411#M41304</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have just upgraded to MCUXpresso 11.1 and all the addresses calculated by the ADR instruction are now messed up.&lt;/P&gt;&lt;P&gt;See screenshots. . . (the software is for an LPC15xx)&lt;/P&gt;&lt;P&gt;Previously, the name of the label required "+1" after it to make sure that it set bit 0 in the destination address for Thumb mode.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Now it seems fairly random whether it does or doesn't. I thought it was something to do with the presence or absence of ".thumb_func", but that doesn't seem to make much difference either.&lt;/P&gt;&lt;P&gt;A simple workaround would be to use "|1" (OR 1) to set bit zero, but that gives an error every time saying that the parameters are wrong for the instruction.&lt;/P&gt;&lt;P&gt;Using the LDR instruction instead appears to work, but changing it throughout the code isn't so simple as the "=" has to be added before the name of the label.&lt;/P&gt;&lt;P&gt;Has anyone else noted this?&lt;/P&gt;&lt;P&gt;A further point, 11.1 seems to get out of sync with the program very easily and refuse to get itself realigned.&lt;/P&gt;&lt;P&gt;Even clicking "debug" doesn't seem always to rewrite the flash, and it appears to do the "attach" procedure instead&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 06 Jul 2020 21:24:58 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/ADR-instruction/m-p/1071411#M41304</guid>
      <dc:creator>ianbenton</dc:creator>
      <dc:date>2020-07-06T21:24:58Z</dc:date>
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    <item>
      <title>Re: ADR instruction</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/ADR-instruction/m-p/1071412#M41305</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, Ian,&lt;/P&gt;&lt;P&gt;Regarding your question, of course, you are right that the PC value must be an odd value for the thumb instruction for Cotem-M3 core.&lt;/P&gt;&lt;P&gt;If you use the Label to branch with B label1, or branch to a function for example BL func1, the func1 and label1 are label, in this way, the assembly compiler of MCUXpresso tools is smart enough to add 1.&lt;/P&gt;&lt;P&gt;I suppose if you use BLX Rm instruction, because user is responsible for computing the target address in Rm, adding 1 using ADR is required by user.&lt;/P&gt;&lt;P&gt;Hope it can help you&lt;/P&gt;&lt;P&gt;BR&lt;/P&gt;&lt;P&gt;XiangJun Rong&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 07 Jul 2020 04:12:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/ADR-instruction/m-p/1071412#M41305</guid>
      <dc:creator>xiangjun_rong</dc:creator>
      <dc:date>2020-07-07T04:12:05Z</dc:date>
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    <item>
      <title>Re: ADR instruction</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/ADR-instruction/m-p/1071413#M41306</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Having examined all of the disassembly, I find the following:&lt;/P&gt;&lt;P&gt;I always use ADR Rx,&amp;lt;label&amp;gt;+1&lt;/P&gt;&lt;P&gt;If the address of the label is GREATER than the current pc address, the compiler produces ADD.W PC,#offset, and offset is always ODD, so it works correctly.&lt;/P&gt;&lt;P&gt;If the address of the label is LESS than the current pc address, the compiler produces SUB.W PC,#offset and the offset is always EVEN, so it fails.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If I refer back to software that has not been complied since I upgraded to McuXpresso 11 I find that the offset is ALWAYS odd regardless of whether the instruction is ADDW or SUBW.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Your explanation please?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Why does ADR Rx,&amp;lt;label&amp;gt;|1 always produce an error?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 12 Jul 2020 07:46:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/ADR-instruction/m-p/1071413#M41306</guid>
      <dc:creator>ianbenton</dc:creator>
      <dc:date>2020-07-12T07:46:30Z</dc:date>
    </item>
    <item>
      <title>Re: ADR instruction</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/ADR-instruction/m-p/1071414#M41307</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Take a look at this&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://stackoverflow.com/questions/59110205/why-do-forward-reference-adr-instructions-assemble-with-even-offsets-in-thumb-co" title="https://stackoverflow.com/questions/59110205/why-do-forward-reference-adr-instructions-assemble-with-even-offsets-in-thumb-co"&gt;assembly - Why do forward reference ADR instructions assemble with even offsets in Thumb code? - Stack Overflow&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 12 Jul 2020 15:35:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/ADR-instruction/m-p/1071414#M41307</guid>
      <dc:creator>converse</dc:creator>
      <dc:date>2020-07-12T15:35:37Z</dc:date>
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    <item>
      <title>Re: ADR instruction</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/ADR-instruction/m-p/1071415#M41308</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;That's mighty interesting reading&lt;/P&gt;&lt;P&gt;However, If my code says:&amp;nbsp;ADR R0,startbreak+1&amp;nbsp;&lt;/P&gt;&lt;P&gt;it assembles as:&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp;a84:&lt;SPAN&gt; &lt;/SPAN&gt;f2af 20bc &lt;SPAN&gt; &lt;/SPAN&gt;subw&lt;SPAN&gt; &lt;/SPAN&gt;r0, pc, #700&lt;SPAN&gt; &lt;/SPAN&gt;; 0x2bc&lt;/P&gt;&lt;P&gt;and if it says:&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;SPAN&gt;ADR R0,startbreak&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;it assembles as:&amp;nbsp;&amp;nbsp; &amp;nbsp; &amp;nbsp;a84:&lt;SPAN&gt; &lt;/SPAN&gt;f2af 20bd &lt;SPAN&gt; &lt;/SPAN&gt;subw&lt;SPAN&gt; &lt;/SPAN&gt;r0, pc, #701&lt;SPAN&gt; &lt;/SPAN&gt;; 0x2bd&lt;/P&gt;&lt;P&gt;it has used "sub.w" both times! It has added an extra 1 twice, making the destination address 1 HIGHER than it should be.&lt;/P&gt;&lt;P&gt;If I specify "ADR.w" then it makes no difference.&lt;/P&gt;&lt;P&gt;But in older versions of MCU Xpresso it got it right. It's only when I was re-developing an old bit of software that I found the problem.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 12 Jul 2020 15:55:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/ADR-instruction/m-p/1071415#M41308</guid>
      <dc:creator>ianbenton</dc:creator>
      <dc:date>2020-07-12T15:55:04Z</dc:date>
    </item>
    <item>
      <title>Re: ADR instruction</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/ADR-instruction/m-p/1071416#M41309</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Maybe there was a bug introduced in GCC (or maybe it was a bug fix?). Did you try v11.1.1?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However, t&lt;SPAN style="color: #242729; background-color: #ffffff;"&gt;he official ARM manual says that the "LDR Rn,=value" pseudo-instruction will be automatically replaced by the fastest and least memory &lt;SPAN&gt;consuming instruction(s) that will load the value into Rn. So, you probably want to replace you ADR's with&amp;nbsp;LDR&lt;SPAN style="background-color: #ffffff;"&gt;&amp;nbsp;Rn, [PC, #208] (or whatever is&amp;nbsp;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;SPAN style="caret-color: #242729; color: #242729; "&gt;appropriate in your code).&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 14 Jul 2020 13:36:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/ADR-instruction/m-p/1071416#M41309</guid>
      <dc:creator>converse</dc:creator>
      <dc:date>2020-07-14T13:36:34Z</dc:date>
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