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    <title>topic LPC55S69: UM2.0 and SPI3 in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-UM2-0-and-SPI3/m-p/1055911#M40875</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi !&lt;/P&gt;&lt;P&gt;We have got UMv2.0 for LPC55S69 and it seem s to me it is not updated again.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I can see&amp;nbsp; ISP supports SPI3&amp;nbsp; ( multiple places ):&lt;/P&gt;&lt;P&gt;"&lt;/P&gt;&lt;P&gt;The LPC55S6x/LPC55S2x/LPC552x probes the active&lt;BR /&gt;peripheral from one of below serial interfaces, and&lt;BR /&gt;download image from the probed peripherals:&lt;BR /&gt;UART0, I2C1, SPI3, HS_SPI, USB0 or USB1.&lt;/P&gt;&lt;P&gt;"&lt;/P&gt;&lt;P&gt;But in our previous discussions we find out that latest ROM revision support HS_SPI only&lt;/P&gt;&lt;P&gt;and SPI3 is used for external SPI memory for backup firmware in case of secure boot.&lt;/P&gt;&lt;P&gt;Or nee ROM revision will come soon ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What do you think about UM2.0 and what is updated compared to v1.9 ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Eugene&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 07 May 2020 06:41:28 GMT</pubDate>
    <dc:creator>EugeneHiihtaja</dc:creator>
    <dc:date>2020-05-07T06:41:28Z</dc:date>
    <item>
      <title>LPC55S69: UM2.0 and SPI3</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-UM2-0-and-SPI3/m-p/1055911#M40875</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi !&lt;/P&gt;&lt;P&gt;We have got UMv2.0 for LPC55S69 and it seem s to me it is not updated again.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I can see&amp;nbsp; ISP supports SPI3&amp;nbsp; ( multiple places ):&lt;/P&gt;&lt;P&gt;"&lt;/P&gt;&lt;P&gt;The LPC55S6x/LPC55S2x/LPC552x probes the active&lt;BR /&gt;peripheral from one of below serial interfaces, and&lt;BR /&gt;download image from the probed peripherals:&lt;BR /&gt;UART0, I2C1, SPI3, HS_SPI, USB0 or USB1.&lt;/P&gt;&lt;P&gt;"&lt;/P&gt;&lt;P&gt;But in our previous discussions we find out that latest ROM revision support HS_SPI only&lt;/P&gt;&lt;P&gt;and SPI3 is used for external SPI memory for backup firmware in case of secure boot.&lt;/P&gt;&lt;P&gt;Or nee ROM revision will come soon ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What do you think about UM2.0 and what is updated compared to v1.9 ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Eugene&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 May 2020 06:41:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-UM2-0-and-SPI3/m-p/1055911#M40875</guid>
      <dc:creator>EugeneHiihtaja</dc:creator>
      <dc:date>2020-05-07T06:41:28Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69: UM2.0 and SPI3</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-UM2-0-and-SPI3/m-p/1055912#M40876</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Eugene, &lt;/P&gt;&lt;P&gt;Please check UM ver.2.0, page 134&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/98607iC660F524F70D9991/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;[1] SPI ISP mode on Flexcomm 3 is supported on device revision A0 only.&lt;/P&gt;&lt;P&gt;[2] SPI Flash Recovery mode applies to device revision 1B only.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;Jun Zhang&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 May 2020 03:08:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-UM2-0-and-SPI3/m-p/1055912#M40876</guid>
      <dc:creator>ZhangJennie</dc:creator>
      <dc:date>2020-05-08T03:08:09Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69: UM2.0 and SPI3</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-UM2-0-and-SPI3/m-p/1055913#M40877</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Jun Zhang !&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Thank you !&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Could you point me to place where mention that GPIO pins loze direction while PowerDown mode.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;E.g Outputs are drops to Input.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Eugene&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 May 2020 06:13:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-UM2-0-and-SPI3/m-p/1055913#M40877</guid>
      <dc:creator>EugeneHiihtaja</dc:creator>
      <dc:date>2020-05-08T06:13:55Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69: UM2.0 and SPI3</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-UM2-0-and-SPI3/m-p/1055914#M40878</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Eugene&lt;/SPAN&gt;,&lt;/P&gt;&lt;P&gt;Sorry I am confused, or maybe I forget. Is this issue "&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt; GPIO pins loze direction while PowerDown mode.&lt;/SPAN&gt;" related with SPI3 issue? If not, Did I ever handle this GPIO issue or someone else? Normally we need check a certain issue status with the engineer who reported it.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards&lt;/P&gt;&lt;P&gt;Jun Zhang&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 May 2020 06:40:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-UM2-0-and-SPI3/m-p/1055914#M40878</guid>
      <dc:creator>ZhangJennie</dc:creator>
      <dc:date>2020-05-08T06:40:46Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69: UM2.0 and SPI3</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-UM2-0-and-SPI3/m-p/1055915#M40879</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&amp;nbsp;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Jun Zhang !&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;No this is common GPIO relative issue. Lozing direction of GPIO pins was big surprise for us and was detected during testing.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;But we need confirmation about it in UM.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;For example it is discussed here :&amp;nbsp;&lt;A href="https://community.nxp.com/thread/523000"&gt;https://community.nxp.com/thread/523000&lt;/A&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;I try to check UM for issues what we discovered and reported and if all of them clearly confirmed in documtation.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Regards,&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Eugene&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 May 2020 07:11:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-UM2-0-and-SPI3/m-p/1055915#M40879</guid>
      <dc:creator>EugeneHiihtaja</dc:creator>
      <dc:date>2020-05-08T07:11:59Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69: UM2.0 and SPI3</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-UM2-0-and-SPI3/m-p/1055916#M40880</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Eugene&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;This GPIO&amp;nbsp; issue is handled by Sabina. I can't know its internal status. I suggest you create a separate thread for it. Or create a private case to support team.&lt;/P&gt;&lt;P&gt;Thanks for your understanding&lt;/P&gt;&lt;P&gt;Jun Zhang&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 08 May 2020 08:10:18 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-UM2-0-and-SPI3/m-p/1055916#M40880</guid>
      <dc:creator>ZhangJennie</dc:creator>
      <dc:date>2020-05-08T08:10:18Z</dc:date>
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