LPC Microcontrollers中的主题 Re: Buffer management for PowerQuad

Buffer management for PowerQuad

Norihiro — Thu, 07 May 2020 08:17:18 GMT

Hello,

I understand PowerQuad is suitable for ones that need high performance digital filter, FFT on MCU.

When I went over the relevant documents and samples source code for LPC55S69 evaluation board,

I could understand how I should use PowerQuad from c source code.

Those sample code just demonstrate computation on pre-defined samples.

In the actual usage, buffer management is also important for signal processing.

i.e., during computation on specified block size, new samples from such as

ADC will be sent to buffer(SRAM) in parallel for next computation.

In the traditional DSP device, dedicated ring/circular buffer pointer along with

DMA is useful for those buffer management.

In case of LPC, software running on LPC must manage that input buffer for new sampling data.

Do you have sample code which demonstrates the buffer management suitable for LPC with PowerQuad?

Regards,

Norihiro Michigami

AVNET

Re: Buffer management for PowerQuad

xiangjun_rong — Fri, 08 May 2020 05:18:22 GMT

Hi, Norihiro,

Unfortunately, from hardware perspective, both the PowerQuad and Cortex-M33 do not support the modulo feature which most of DSPs support.

The following is the DSP56800E modulo addressing figure. But the LPC55xx is not DSP, it does not support modulo address mode from hardware perspective. So you have to develop a software ring mechanism, but you have to check if the array index is out of array boundary, so the method is inefficient.

Hope it can help you

Xiangjun Rong

Re: Buffer management for PowerQuad

Norihiro — Mon, 11 May 2020 00:37:53 GMT

Hello Xiangjun,

Thank you for your answer.

I understood that we must manage address pointer for a buffer with software.

It consumes CPU core resource, but I expect that such overhead can be hidden in certain degree,

when we use PowerQuad which should be able to work with CPU core in parallel.

Regards,

Norihiro Michigami