LPC MicrocontrollersのトピックRe: DMA for Flexcomm SPI with 20-24-bit peripherals?

DMA for Flexcomm SPI with 20-24-bit peripherals?

davenadler — Tue, 31 Mar 2020 16:41:33 GMT

We have what is a pretty common requirement for modern applications especially IOT.
Specifically, we need to, without code intervention - DMA only:
- read results from several SPI sensors
- interrupt (and possibly wake up sleeping) CPU after all the results are available in RAM
- the peripherals are 20-bit and 24-bit sensors (common for ADC and sensors like accelerometer, pressure, etc)
For each peripheral CS is asserted once, then 24 bits clocked in over SPI, and only after all data read CS de-asserted.
I was able to do this all with DMA+SPI on Kinetis K64F (DMA to sequence multiple CS toggling and multiple SPI xfers).
Successful products now shipping doing this on K64F ;-)
Now we're considering LPC55xxxx for next projects.

So, the question: Using DMA and flexcomm SPI, how does one accomplish this on LPC55xxx?
Flexcomm SPI documentation says:

'Data frames of 4 to 16 bits supported directly. Larger frames supported by software'
We need to read multiple 24-bit SPI devices before any interrupt. No multiple interrupts!
Only interrupt when all data read into RAM!

Thanks in advance for any pointers!
Best Regards, Dave

Re: DMA for Flexcomm SPI with 20-24-bit peripherals?

Alexis_A — Wed, 01 Apr 2020 22:47:53 GMT

Hello davenadler‌,

The reference manual mention the following regarding larger frames:

Larger sizes can be handled by splitting data up into groups of 16 bits or less. For example, 24 bits can be supported as two groups of 16 bits and 8 bits or two groups of 12 bits, among others. Frames of any size, including greater than 32 bits, can be supported in the same way.

Sending two groups of 12 bits with SSEL de-asserted between 24-bit increments, for instance, would require changing the value of the EOF bit on alternate 12-bit frames.

If you only want a single interruption between transfers you could try using the DMA interrupt instead of the SPI one.

Let me know if this helps you.

Best Regards,

Alexis Andalon

Re: DMA for Flexcomm SPI with 20-24-bit peripherals?

davenadler — Thu, 02 Apr 2020 15:37:22 GMT

Thanks Alexis, but you have not answered my question:
Using DMA and flexcomm SPI, how does one accomplish this on LPC55xxx?

How does one use DMA to sequence CS control and SPI operations to perform
for example a read from a 24-bit SPI device, with an interrupt only
when the data is read into RAM and ready to process?
Again, note CS must be asserted before clocking data, and de-asserted only after all 24-bits clocked in.

Thanks!
Best Regards, Dave

Re: DMA for Flexcomm SPI with 20-24-bit peripherals?

Alexis_A — Fri, 03 Apr 2020 15:07:58 GMT

Hello davenadler‌,

The EOF bit is used to manage the transmissions greater than 16 bits, so you will need to set this bit and set the FRAME_DELAY to 0, this way you could receive the full ADC frame as two transfers, or if you want as 3 8-bit transfers.

Also, if you need the SSEL is not asserted between transfers this bit could help you to do it.

In the SDK (link for download here), there's an example called spi_dma_b2b_transfer that you can use as reference.

I hope this helps you.

Best Regards,

Alexis Andalon

Re: DMA for Flexcomm SPI with 20-24-bit peripherals?

davenadler — Mon, 06 Apr 2020 22:12:12 GMT

Thank you Alexis for pointing out the deferred CS de-assert.

However, you still have not answered my question.

Again,
Using DMA and flexcomm SPI, how does one read (2) 24-bit SPI sensors without CPU intervention on LPC55xxx?
No interrupt until the data has been read into memory and is ready to process.

Thanks,
Best Regards, Dave