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    <title>LPC MicrocontrollersのトピックLPC55S69 : gpio interrupt capacity</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-gpio-interrupt-capacity/m-p/1022331#M39930</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi !&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have got the next limitation what I not understand quite well.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;By using PINT peripherals I'm able to have only 8 individual pins what can generate individual type of interrupts, edges /levels and etc. ( patterns can be used instead of individual pins.)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And looks like PINT interrupts is not able to wakeup&amp;nbsp; Core0 from Sleep mode.&lt;/P&gt;&lt;P&gt;SDK examples show that pin for use in ACTIVE mode is initialized individually as well.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Secure PINT might serve 2 extra pins from GPIO0 port.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;From other side GINT0 and GINT1 can serve almost all pins for wakeup MCU from Power-Down mode.&lt;/P&gt;&lt;P&gt;I'm not quite sure if the same pin can be included in both GINTx block for serve both edges.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I need to use 17 external individual pins what generate interrupts in ACTIVE, Sleep and Power_Down mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;GINTx is able to wakeup MCU from PowerDown or Sleep mode and I can identify source of interrupt e,g pin number.&lt;/P&gt;&lt;P&gt;But not clear if I can detect both edges.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But if MCU in Active mode looks like GINT dosn't work any more and only PINT can be used and I can serve only 8 interrupt pins. Is this so ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I no need individual interrupt handler but I need solution when both edges of 17 GPIOs ( they all on GPIO1 port ) will cause ISR in ACTIVE, Sleep and PowerDown mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Gould you give advice about possible solution.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Eugene&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 07 Nov 2019 13:40:39 GMT</pubDate>
    <dc:creator>EugeneHiihtaja</dc:creator>
    <dc:date>2019-11-07T13:40:39Z</dc:date>
    <item>
      <title>LPC55S69 : gpio interrupt capacity</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-gpio-interrupt-capacity/m-p/1022331#M39930</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi !&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have got the next limitation what I not understand quite well.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;By using PINT peripherals I'm able to have only 8 individual pins what can generate individual type of interrupts, edges /levels and etc. ( patterns can be used instead of individual pins.)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And looks like PINT interrupts is not able to wakeup&amp;nbsp; Core0 from Sleep mode.&lt;/P&gt;&lt;P&gt;SDK examples show that pin for use in ACTIVE mode is initialized individually as well.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Secure PINT might serve 2 extra pins from GPIO0 port.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;From other side GINT0 and GINT1 can serve almost all pins for wakeup MCU from Power-Down mode.&lt;/P&gt;&lt;P&gt;I'm not quite sure if the same pin can be included in both GINTx block for serve both edges.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I need to use 17 external individual pins what generate interrupts in ACTIVE, Sleep and Power_Down mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;GINTx is able to wakeup MCU from PowerDown or Sleep mode and I can identify source of interrupt e,g pin number.&lt;/P&gt;&lt;P&gt;But not clear if I can detect both edges.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But if MCU in Active mode looks like GINT dosn't work any more and only PINT can be used and I can serve only 8 interrupt pins. Is this so ?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I no need individual interrupt handler but I need solution when both edges of 17 GPIOs ( they all on GPIO1 port ) will cause ISR in ACTIVE, Sleep and PowerDown mode.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Gould you give advice about possible solution.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Eugene&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 07 Nov 2019 13:40:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-gpio-interrupt-capacity/m-p/1022331#M39930</guid>
      <dc:creator>EugeneHiihtaja</dc:creator>
      <dc:date>2019-11-07T13:40:39Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 : gpio interrupt capacity</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-gpio-interrupt-capacity/m-p/1022332#M39931</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Eugene,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The group can be level or edge triggered. Both edges can cause the trigger depending on the polarity configured if it goes from high to low or visa versa.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;I no need individual interrupt handler but I need solution when both edges of 17 GPIOs ( they all on GPIO1 port ) will cause ISR in ACTIVE, Sleep and PowerDown mode.&lt;/SPAN&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;Could you please clarify. Do you need 17 interrupts with GPIO pins at the same time?&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Sabina&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Nov 2019 05:05:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-gpio-interrupt-capacity/m-p/1022332#M39931</guid>
      <dc:creator>Sabina_Bruce</dc:creator>
      <dc:date>2019-11-12T05:05:29Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 : gpio interrupt capacity</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-gpio-interrupt-capacity/m-p/1022333#M39932</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Sabina !&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;No, interrupts happens quite rare ( up to 2 times per second max). But all of them should wakeup MCU and source of interrupt should be possible to identify. Also I need to detect both edges and some pin can change edge what should be detected sometimes.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I try to do some testing with old A1 board and create this request :&amp;nbsp;&lt;A href="https://community.nxp.com/message/1230588"&gt;https://community.nxp.com/message/1230588&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;May be I should try level detection and also try A2 ( new silicon revision ) to check this issue.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;But one GPIO pin works in case of both edges, but multiple - no.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;this is blocker for me and I need more information how-to handle all of those.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Eugene&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Nov 2019 06:30:19 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-gpio-interrupt-capacity/m-p/1022333#M39932</guid>
      <dc:creator>EugeneHiihtaja</dc:creator>
      <dc:date>2019-11-12T06:30:19Z</dc:date>
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