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  <channel>
    <title>topic Re: LPC55S69 Secure Boot Failing in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017768#M39799</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I did also notice this in the user manual regarding the CFPA page in section 7.3.2.1.2:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;PRE __default_attr="info" __jive_macro_name="alert" alert="info" class="jive_text_macro jive_macro_alert"&gt;&lt;P&gt;&lt;SPAN class=""&gt;Secure_FW_version: &lt;/SPAN&gt;&lt;SPAN class=""&gt;Used during SB2 file loading. The value written in this
configuration word must be always lower or equal to secure FW version specified in
elftosb .bd file used for creating SB2 file. Otherwise the SB file load will be rejected.
&lt;/SPAN&gt;&lt;SPAN class=""&gt;NS_FW_version: &lt;/SPAN&gt;&lt;SPAN class=""&gt;Used during SB2 file loading. The value written in this configuration
word must be always lower or equal to non-secure FW version specified in elftosb .bd file
used for creating SB2 file. Otherwise the SB file load will be rejected.&lt;/SPAN&gt;&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;I don't see secure FW version or NS FW version mentioned in the elftosb manual at all. Could this be what I am missing? I did not encounter any errors in programming the CFPA page to enable the ROTK.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 20 Jan 2020 23:43:59 GMT</pubDate>
    <dc:creator>derek_imanuel</dc:creator>
    <dc:date>2020-01-20T23:43:59Z</dc:date>
    <item>
      <title>LPC55S69 Secure Boot Failing</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017760#M39791</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, I am trying to configure a LPC55S69-EVK to demonstrate the secure bootloader and secure update via SB2 loading and I'm not able to get anything to boot when the secure boot option is enabled (boot signed images via elftosb-gui) even when using the included example self-signed certificate and private key found in&amp;nbsp;SDK_2.6.3_LPC55S69\middleware\mcu-boot\bin\Tools\workspace\keys_and_certs&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I follow these steps:&lt;/P&gt;&lt;P&gt;1. Generate signed secure image (signed_secure.png attached)&lt;/P&gt;&lt;P&gt;2. Generate signed non-secure image (signed_nonsecure.png attached)&lt;/P&gt;&lt;P&gt;3. Program both images:&lt;/P&gt;&lt;PRE __default_attr="info" __jive_macro_name="alert" alert="info" class="jive_text_macro jive_macro_alert"&gt;&lt;P&gt;..\..\..\Tools\Programming\BLHost\blhost.exe -V -p COM14,115200 -- flash-erase-region 0x00000 0x34000
..\..\..\Tools\Programming\BLHost\blhost.exe -V -p COM14,115200 -- flash-erase-region 0x78000 0x4000
..\..\..\Tools\Programming\BLHost\blhost.exe -V -p COM14,115200 -- write-memory 0 hello_world_test_sec.bin
..\..\..\Tools\Programming\BLHost\blhost.exe -V -p COM14,115200 -- write-memory 0x78000 hello_world_test_nonsec.bin&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;4. Program configuration for puf keystore (puf_cfg.png attached)&lt;/P&gt;&lt;P&gt;5. Program configuration for secure bootloader (secureboot_cfg.png attached)&lt;/P&gt;&lt;P&gt;6. Read CFPA page (0x9DE00) and set byte @ 0x9DE18 to 0x01, write modified page back to 0x9DE00&lt;/P&gt;&lt;P&gt;7. Reset, connect to serial port to monitor output from secure/nonsecure simple application--no activity found, application is not booting.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If I change the secure boot configuration in elftosb-gui (Device-&amp;gt;Security-&amp;gt;Secure Boot) from 'Boot signed images' to 'Boot plain images' I can see the code is running from the serial port output and there is no issue.&amp;nbsp;I'm not sure what I could be doing wrong but the information seems to point to there be an issue with the self-signed certificate/private key or signature--how can that be if I am using the included example self-signed cert and private key and followed the directions above?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Attempting to update via SB2 file also fails. I follow these steps:&lt;/P&gt;&lt;P&gt;1. Create SB2 file:&lt;/P&gt;&lt;P&gt;BD cfg file:&lt;/P&gt;&lt;PRE __default_attr="info" __jive_macro_name="alert" alert="info" class="jive_text_macro jive_macro_alert"&gt;&lt;P&gt;options
{
 flags = 0x04;
 buildNumber = 0x01;
 productVersion = "1.00.00";
 componentVersion = "1.00.00";
}&lt;/P&gt;&lt;P&gt;sources
{
 secImage = "hello_world_test_sec.bin";
 nonSecImage = "hello_world_test_nonsec.bin";
}&lt;/P&gt;&lt;P&gt;section (0)
{
 erase 0x00000000..0x00034000;
 load secImage &amp;gt; 0x00000000;
 erase 0x78000..0x88000;
 load nonSecImage &amp;gt; 0x78000;
}&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;SB2 generation:&lt;/P&gt;&lt;PRE __default_attr="info" __jive_macro_name="alert" alert="info" class="jive_text_macro jive_macro_alert"&gt;&lt;P&gt;@echo off
set SB_KEK="D:\ENCRYPTION\BIO\SECURE_BOOT\SBK.txt"
set SB_CFG=hello_world_test_cfg_sb2.bd
set SB_OUT=hello_world_test_sb2.sb2
@echo on
..\..\..\Tools\Programming\elftosb_gui\elftosb\win\elftosb.exe -V -f lpc55xx -k %SB_KEK% -c %SB_CFG% -o %SB_OUT%&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;2. Load SB2 file:&lt;/P&gt;&lt;PRE __default_attr="info" __jive_macro_name="alert" alert="info" class="jive_text_macro jive_macro_alert"&gt;&lt;P&gt;..\..\..\Tools\Programming\BLHost\blhost.exe -V -p COM14,115200 -- receive-sb-file hello_world_test_sb2.sb2&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;3. Error result:&lt;/P&gt;&lt;PRE __default_attr="info" __jive_macro_name="alert" alert="info" class="jive_text_macro jive_macro_alert"&gt;&lt;P&gt;Ping responded in 1 attempt(s)
Framing protocol version = 0x50010300, options = 0x0
Inject command 'receive-sb-file'
Preparing to send 218848 (0x356e0) bytes to the target.
Successful response to command 'get-property(max-packet-size)'
Successful generic response to command 'receive-sb-file'
Data phase write aborted by status 0x2712 kStatus_AbortDataPhase
Possible JUMP or RESET command received.
 - took 0.290 seconds
Response status = 10101 (0x2775) kStatusRomLdrSignature
Wrote 0 of 218848 bytes.&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please let me know if I can provide any more information to help diagnose this issue. Thank you&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 25 Dec 2019 04:42:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017760#M39791</guid>
      <dc:creator>derek_imanuel</dc:creator>
      <dc:date>2019-12-25T04:42:42Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 Secure Boot Failing</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017761#M39792</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I suggest you check the following application note,&amp;nbsp; this appnote describes the various types of non-secure and secure boot options.&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/docs/en/application-note/AN12283.pdf" title="https://www.nxp.com/docs/en/application-note/AN12283.pdf"&gt;https://www.nxp.com/docs/en/application-note/AN12283.pdf&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope this helps,&amp;nbsp;&lt;/P&gt;&lt;P&gt;have a nice day&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards&amp;nbsp;&lt;/P&gt;&lt;P&gt;Soledad&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Jan 2020 16:20:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017761#M39792</guid>
      <dc:creator>soledad</dc:creator>
      <dc:date>2020-01-02T16:20:46Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 Secure Boot Failing</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017762#M39793</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi soledad, I have been following the Secure Boot documentation to the letter to create this example. The application note has been the starting point to get to where I created this example. Can you share what information I may have missed or am not following from the application note? Thank you&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 02 Jan 2020 19:34:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017762#M39793</guid>
      <dc:creator>derek_imanuel</dc:creator>
      <dc:date>2020-01-02T19:34:29Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 Secure Boot Failing</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017763#M39794</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;SB2 file issymetrically encrypted. For decryption of the file, the key has to be loaded into device. The key size for&lt;BR /&gt;SB2 file is 256 bits. During boot, the SB key is used with AES to decrypt the SB2 file. The SB key input for&lt;BR /&gt;ELFTOSB GUI is .txt file with plain text key. This key is loaded into PUF key store of LPC55Sxx.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_3.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/101499iDA318810C328589D/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_3.png" alt="pastedImage_3.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;SB2 file creation&lt;BR /&gt;Run elftosb command line tool with arguments below:&lt;BR /&gt;elftosb.exe -V -f lpc55xx -k "keys\sbkek.txt" -c "commandFile.bd" -o "output.sb2"&lt;BR /&gt;•-k &amp;lt;path to SB key for encryption(.txt)&amp;gt;&lt;BR /&gt;•-c &amp;lt;path to SB file config(.bd)&amp;gt;&lt;BR /&gt;•-o &amp;lt;path to output file(.sb2)&amp;gt;&lt;BR /&gt;SB file config file contains configuration commands that will be processed after SB2 file is loaded in the device.&lt;BR /&gt;In part sources is our new signed image.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_4.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/101502iD6AF564491E12E59/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_4.png" alt="pastedImage_4.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The SB2 file created with the updated binary image can be loaded into the device through ISP command handler&lt;BR /&gt;with command receive sb file:&lt;BR /&gt;blhost -p COMxx receive-sb-file &amp;lt;path to the secured binary(.sb2)&amp;gt;&lt;BR /&gt;After successfully loading the SB2 file it is executed as configured in SB configuration file (.bd file).&lt;BR /&gt;When the file is executed, the internal flash address from 0x0 to 0x40000 is erased.&lt;BR /&gt;After flash erase operation, the image mentioned in the mainImage parameter is loaded to address 0x0.&lt;BR /&gt;Reset the device after these operations:&lt;BR /&gt;Press reset pin or run BLHOST tool blhost -p COMxx reset&lt;BR /&gt;The updated image loaded into internal flash starts to execute.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope this helps,&lt;/P&gt;&lt;P&gt;have a nice day&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Soledad&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 03 Jan 2020 16:08:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017763#M39794</guid>
      <dc:creator>soledad</dc:creator>
      <dc:date>2020-01-03T16:08:41Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 Secure Boot Failing</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017764#M39795</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Soledad,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm not sure if I'm missing anything but did you see the step #4&amp;nbsp;I listed in my original post where I state I program the PUF keystore (with SBKEK) and the creation of the SB2 file below that?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The attachment puf_cfg.png shows where I load the PUF keystore with the SBKEK 256bit AES key in plain text. I followed the example to create the key in the Secure Boot application note.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I then use that same key for the creation of the SB2 file below in my original post. I am posting it here again in case you missed it:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1. Create SB2 file:&lt;/P&gt;&lt;P&gt;BD cfg file:&lt;/P&gt;&lt;PRE __default_attr="info" __jive_macro_name="alert" alert="info" class="jive_text_macro jive_macro_alert"&gt;&lt;P&gt;options
{
flags = 0x04;
buildNumber = 0x01;
productVersion = "1.00.00";
componentVersion = "1.00.00";
}&lt;/P&gt;&lt;P&gt;sources
{
secImage = "hello_world_test_sec.bin";
nonSecImage = "hello_world_test_nonsec.bin";
}&lt;/P&gt;&lt;P&gt;section (0)
{
erase 0x00000000..0x00034000;
load secImage &amp;gt; 0x00000000;
erase 0x78000..0x88000;
load nonSecImage &amp;gt; 0x78000;
}&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;SB2 generation:&lt;/P&gt;&lt;PRE __default_attr="info" __jive_macro_name="alert" alert="info" class="jive_text_macro jive_macro_alert"&gt;&lt;P&gt;@echo off
set SB_KEK="D:\ENCRYPTION\BIO\SECURE_BOOT\SBK.txt"
set SB_CFG=hello_world_test_cfg_sb2.bd
set SB_OUT=hello_world_test_sb2.sb2
@echo on
..\..\..\Tools\Programming\elftosb_gui\elftosb\win\elftosb.exe -V -f lpc55xx -k %SB_KEK% -c %SB_CFG% -o %SB_OUT%&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;2. Load SB2 file:&lt;/P&gt;&lt;PRE __default_attr="info" __jive_macro_name="alert" alert="info" class="jive_text_macro jive_macro_alert"&gt;&lt;P&gt;..\..\..\Tools\Programming\BLHost\blhost.exe -V -p COM14,115200 -- receive-sb-file hello_world_test_sb2.sb2&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Maybe I am missing something from your reply but I don't see how I did not follow the steps you copied from the Secure Boot application note. Can you share where in my list of steps the problem could be? To me, it looks correct.&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 03 Jan 2020 16:55:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017764#M39795</guid>
      <dc:creator>derek_imanuel</dc:creator>
      <dc:date>2020-01-03T16:55:35Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 Secure Boot Failing</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017765#M39796</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Derek,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I tested attached certificates in SDK and all works. Hopefully I found your issues.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;1)&amp;nbsp; Issue with secure boot&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;I expect your issue for secure bootloader is due to incorect CFPA page modification.&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&lt;STRONG&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;"6. Read CFPA page (0x9DE00) and set byte @ 0x9DE18 to 0x01, write modified page back to 0x9DE00"&lt;/STRONG&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&lt;/STRONG&gt;I tested your modification and ROM will not accept this CFPA page. (see screen below)&lt;/P&gt;&lt;P&gt;&lt;SPAN class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;IMG alt="pastedImage_2.png" src="https://community.nxp.com/t5/image/serverpage/image-id/66328iC5456C759F2E99C9/image-size/large?v=v2&amp;amp;px=999" title="pastedImage_2.png" /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;CFPA page has at offset &lt;STRONG&gt;0x4 Version register. &lt;/STRONG&gt;Each time when you load new CFPA page Version has to be incremented &amp;nbsp;&amp;nbsp;&amp;nbsp;for loading new CFPA page.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="text-decoration: underline;"&gt;&lt;STRONG&gt;2)&amp;nbsp;&lt;/STRONG&gt; &lt;STRONG&gt;SB file issue&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;I expect that you are using 1B silicon. The 0A version of the LPC55S6xx silicon supports version 2.0 and the 1B version of &amp;nbsp;&amp;nbsp;&amp;nbsp;the LPC55S6xx supports version 2.1 of the SB image format. SB 2.0 is encrypted and SB2.1 is encrypted + signed.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;As you posted you are generating SB2.0 which is not valid for 1B silicon.&lt;/P&gt;&lt;PRE class="language-none line-numbers"&gt;&lt;CODE&gt;@echo off
set SB_KEK="D:\ENCRYPTION\BIO\SECURE_BOOT\SBK.txt"
set SB_CFG=hello_world_test_cfg_sb2.bd
set SB_OUT=hello_world_test_sb2.sb2
@echo on
..\..\..\Tools\Programming\elftosb_gui\elftosb\win\elftosb.exe -V -f lpc55xx -k %SB_KEK% -c %SB_CFG% -o %SB_OUT%‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍&lt;SPAN class="line-numbers-rows"&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;Example of use (Encrypted + Signed SB):&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;1 root key&lt;/STRONG&gt;&lt;/P&gt;&lt;PRE class="language-none line-numbers"&gt;&lt;CODE&gt;elftosb.exe -f lpc55xx -k "sbkek.txt" -c "commandFile.bd" -o "output.sb2" -s selfsign_privatekey_rsa2048.pem" -S "selfsign_v3.der.crt" -R "selfsign_v3.der.crt" -h "RKTH.bin" "input.bin"‍‍&lt;SPAN class="line-numbers-rows"&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;4 root keys&lt;/STRONG&gt;&lt;/P&gt;&lt;PRE class="language-none line-numbers"&gt;&lt;CODE&gt;elftosb.exe&amp;nbsp; -f lpc55xx -k "sbkek.txt" -c "commandFile.bd" -o "output.sb2" -s private_key_1_2048.pem -S certificate_1_2048.der.crt -R certificate_1_2048.der.crt -R certificate_2_2048.der.crt -R certificate_3_2048.der.crt -R certificate_4_2048.der.crt -h "RHKT.bin" "input.bin"&lt;SPAN class="line-numbers-rows"&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;.bd file content&lt;/STRONG&gt;&lt;/P&gt;&lt;PRE class="language-none line-numbers"&gt;&lt;CODE&gt;options {
flags = 0x8; // 0x8 encrypted + signed, 0x4 encrypted
buildNumber = 0x1;
productVersion = "1.00.00";
componentVersion = "1.00.00";
}
sources {
inputFile = extern(0);
}
section (0) {
erase 0x0..0x40000;
load inputFile &amp;gt; 0x0;
}‍‍‍‍‍‍‍‍‍‍‍‍‍&lt;SPAN class="line-numbers-rows"&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;where&lt;BR /&gt;-f = family lpc55xx&lt;BR /&gt;-k = path to KEK file (SBKEK)&lt;BR /&gt;-c = path to command file to be processed&lt;/P&gt;&lt;P&gt;-o = path to output file&lt;BR /&gt;-s = path to private key of certificate used for signing&lt;BR /&gt;-S = path(s) to certificates in certificate chain, each certificate in chain must be specified with new -S switch in order of how was chain created (root certificate first)&lt;BR /&gt;-R = path(s) to root certificate(s), 1-4 root certificates can be specified, each root certificate must be specified with new -R switch, one of the root certificates must be first certificate specified by -S switch&lt;BR /&gt;-h = path and name of output binary file generated by elftosb, which contain hash of hashes of all root certificates (RKTH), which must be uploaded to the device register&lt;BR /&gt;&lt;BR /&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope this can help your issue.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Tomas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 02 Nov 2020 14:34:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017765#M39796</guid>
      <dc:creator>tomas_voda</dc:creator>
      <dc:date>2020-11-02T14:34:50Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 Secure Boot Failing</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017766#M39797</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Derek, &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Could you please confirm if Tomas's answer helps?&lt;BR /&gt;Have a nice day!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Regards &lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Soledad&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 16 Jan 2020 18:03:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017766#M39797</guid>
      <dc:creator>soledad</dc:creator>
      <dc:date>2020-01-16T18:03:37Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 Secure Boot Failing</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017767#M39798</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tomas,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Sorry for getting back to you so late, I wasn't able to work on this again until today. Yes I am using rev 1B chips and I did try the changes you suggested but I am still getting a failure to boot and SB2 loading failure:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;PRE __default_attr="info" __jive_macro_name="alert" alert="info" class="jive_text_macro jive_macro_alert"&gt;&lt;P&gt;Ping responded in 1 attempt(s)
Framing protocol version = 0x50010300, options = 0x0
Inject command 'receive-sb-file'
Preparing to send 153888 (0x25920) bytes to the target.
Successful response to command 'get-property(max-packet-size)'
Successful generic response to command 'receive-sb-file'
(1/1) 0%Data phase write aborted by status 0x2712 kStatus_AbortDataPhase
Possible JUMP or RESET command received.
 - took 0.374 seconds
Response status = 10101 (0x2775) kStatusRomLdrSignature
Wrote 1024 of 153888 bytes.&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;The only difference I am seeing between your steps and mine is the addition of TrustZone support in my setup. Is it possible for the above error to occur with&amp;nbsp;an improper TrustZone setting in the elftosb-gui tool? I have TZ-M mode set to 'From image header' as seen in the secureboot_cfg.PNG attachment and TZM is enabled for the secure image and disabled for the nonsecure image.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 Jan 2020 19:45:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017767#M39798</guid>
      <dc:creator>derek_imanuel</dc:creator>
      <dc:date>2020-01-20T19:45:21Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 Secure Boot Failing</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017768#M39799</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I did also notice this in the user manual regarding the CFPA page in section 7.3.2.1.2:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;PRE __default_attr="info" __jive_macro_name="alert" alert="info" class="jive_text_macro jive_macro_alert"&gt;&lt;P&gt;&lt;SPAN class=""&gt;Secure_FW_version: &lt;/SPAN&gt;&lt;SPAN class=""&gt;Used during SB2 file loading. The value written in this
configuration word must be always lower or equal to secure FW version specified in
elftosb .bd file used for creating SB2 file. Otherwise the SB file load will be rejected.
&lt;/SPAN&gt;&lt;SPAN class=""&gt;NS_FW_version: &lt;/SPAN&gt;&lt;SPAN class=""&gt;Used during SB2 file loading. The value written in this configuration
word must be always lower or equal to non-secure FW version specified in elftosb .bd file
used for creating SB2 file. Otherwise the SB file load will be rejected.&lt;/SPAN&gt;&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;I don't see secure FW version or NS FW version mentioned in the elftosb manual at all. Could this be what I am missing? I did not encounter any errors in programming the CFPA page to enable the ROTK.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 20 Jan 2020 23:43:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017768#M39799</guid>
      <dc:creator>derek_imanuel</dc:creator>
      <dc:date>2020-01-20T23:43:59Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 Secure Boot Failing</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017769#M39800</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Derek,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;thanks for your reply.&lt;/P&gt;&lt;P&gt;In previous post I had .bd file content for SB2.0, right now below is .bd for SB2.1.&lt;/P&gt;&lt;P&gt;There is additional option&lt;STRONG&gt; secureBinaryVersion&lt;/STRONG&gt;. Please test updated .bd file with this option.&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;STRONG&gt;Secure_FW_version&lt;/STRONG&gt; and &lt;STRONG&gt;NS_FW_version&amp;nbsp;&lt;/STRONG&gt;checker is new functionality. It will be available from elftosb version 5.1.16 and higher. It is not released yet in SDK2.7.0 for LPC55S69. Example usage of this functionality is below in .bd file. You will be able to check version and SB file will process only when checker will return true (version_check sec 0x2 &amp;gt;= Secure_FW_version)&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;Example of use (Encrypted + Signed SB):&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;1 root key&lt;/STRONG&gt;&lt;/P&gt;&lt;PRE class="language-none"&gt;&lt;CODE&gt;elftosb.exe -f lpc55xx -k "sbkek.txt" -c "commandFile.bd" -o "output.sb2" -s selfsign_privatekey_rsa2048.pem" -S "selfsign_v3.der.crt" -R "selfsign_v3.der.crt" -h "RKTH.bin" "input.bin"‍
&lt;/CODE&gt;&lt;/PRE&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;4 root keys&lt;/STRONG&gt;&lt;/P&gt;&lt;PRE class="language-none"&gt;&lt;CODE&gt;elftosb.exe&amp;nbsp; -f lpc55xx -k "sbkek.txt" -c "commandFile.bd" -o "output.sb2" -s private_key_1_2048.pem -S certificate_1_2048.der.crt -R certificate_1_2048.der.crt -R certificate_2_2048.der.crt -R certificate_3_2048.der.crt -R certificate_4_2048.der.crt -h "RHKT.bin" "input.bin"‍
&lt;/CODE&gt;&lt;/PRE&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;STRONG&gt;SB2.1 .bd file content&lt;/STRONG&gt;&lt;/P&gt;&lt;PRE class="language-none line-numbers"&gt;&lt;CODE&gt;options {
flags = 0x8; // 0x8 encrypted + signed, 0x4 encrypted
buildNumber = 0x1;
productVersion = "1.00.00";
componentVersion = "1.00.00";
secureBinaryVersion = "2.1";
}
sources {
inputFile = extern(0);
}
section (0) {
version_check sec 0x2;
version_check nsec 2;
erase 0x0..0x40000;
load inputFile &amp;gt; 0x0;
}‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍&lt;SPAN class="line-numbers-rows"&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;SPAN&gt;‍&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/CODE&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope this can help your issue.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Tomas&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 21 Jan 2020 10:19:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017769#M39800</guid>
      <dc:creator>tomas_voda</dc:creator>
      <dc:date>2020-01-21T10:19:15Z</dc:date>
    </item>
    <item>
      <title>Re: LPC55S69 Secure Boot Failing</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017770#M39801</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Tomas,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Adding the following line to the BD config file fixed everything for me:&lt;/P&gt;&lt;PRE __default_attr="info" __jive_macro_name="alert" alert="info" class="jive_text_macro jive_macro_alert"&gt;&lt;P&gt;secureBinaryVersion = "2.1";&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The two lines below were not recognized and resulted in errors from elftosb so I removed them from the config:&lt;/P&gt;&lt;PRE __default_attr="info" __jive_macro_name="alert" alert="info" class="jive_text_macro jive_macro_alert"&gt;&lt;P&gt;version_check sec 0x2; &lt;/P&gt;&lt;P&gt;version_check nsec 2;&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your help in resolving this.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 22 Jan 2020 18:26:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC55S69-Secure-Boot-Failing/m-p/1017770#M39801</guid>
      <dc:creator>derek_imanuel</dc:creator>
      <dc:date>2020-01-22T18:26:46Z</dc:date>
    </item>
  </channel>
</rss>

