topic Re: LPC55S69: RAM reservation for ROM API operations in LPC Microcontrollers

LPC55S69: RAM reservation for ROM API operations

EugeneHiihtaja — Wed, 22 Jan 2020 12:16:34 GMT

Hi !

I try to understand what exact RAM areas can be reserved when some ROM API called and MCU is not in ISP mode.

For example when FLASH memory API in use or Power Management ( backup area is documented .)

In UM chapter 7.3.6.6 Secure ROM API :

The ROM reserved space for global variables in RAM on this
LPC55S6x/LPC55S2x/LPC552x product is:
0x30000000 to 0x30003FFF
0x14005000 to 0x140059FF

So this is valid for Secure ROM API in case if the used or it is valid for any ROM API usage ?

2. ROM in ISP mode

UM 8.3.4.2 RAM used by the ISP command handler

So this is for ISP mode only.

But I can't find SRAM areas what used by FLASH API.

Do you have information about it ?

Regards,

Eugene

Re: LPC55S69: RAM reservation for ROM API operations

Sabina_Bruce — Tue, 28 Jan 2020 15:44:01 GMT

Hello Eugene,

In UM chapter 7.3.6.6 Secure ROM API :

So this is valid for Secure ROM API in case if the used or it is valid for any ROM API usage ?

In theory you are able to use the space for any use. However if you plan on using the ROM API it is not recommended to use this space for anything other than its original purpose. If you do decide to use it for another purpose, please refer to the statement in the same section.

The caller has to assure that it doesn't have any data in the global variables location before the function call. The caller shall discard the data in the global variables location after the function returns.

2. The information is not specified.

Best Regards,

Sabina

Re: LPC55S69: RAM reservation for ROM API operations

EugeneHiihtaja — Tue, 28 Jan 2020 17:14:19 GMT

Hi sabinabruce‌ !

So no idea for this topic:

But I can't find SRAM areas what used by FLASH API.

Do you have information about it ?

Regards,

Eugene

Re: LPC55S69: RAM reservation for ROM API operations

Sabina_Bruce — Wed, 29 Jan 2020 23:02:28 GMT

Hello Eugene,

I have requested this information from our design team. I will update you as soon as I have an answer.

Regards,

Sabina

Re: LPC55S69: RAM reservation for ROM API operations

EugeneHiihtaja — Thu, 30 Jan 2020 06:36:31 GMT

Hi sabinabruce‌ !

Thank you !

I hope it is not so massive reservation as mentioned in 8.3.4.2 RAM used by the ISP command handler UM chapter.

Regards,

Eugene

Re: LPC55S69: RAM reservation for ROM API operations

Sabina_Bruce — Tue, 04 Feb 2020 20:35:48 GMT

Hello Eugene,

I received a response from our team.

The Flash API in LPC55S6x won't need extra RAM for Stack. Only Secure ROM API need such RAM for stack purpose.

Best Regards,

Sabina

Re: LPC55S69: RAM reservation for ROM API operations

EugeneHiihtaja — Wed, 05 Feb 2020 06:14:54 GMT

Hi Sabina !

Thank you !

It means POWER API is not used "external" SRAM as well. Is this so ?

Regards,

Eugene

Re: LPC55S69: RAM reservation for ROM API operations

Sabina_Bruce — Thu, 06 Feb 2020 17:20:47 GMT

If CPU retention used in power-down mode, SRAMX_2 (0x1400 6000 to 0x1400 65FF) is used (total 1.5 KB) by default in Power API.