<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LPC MicrocontrollersのトピックDMA for SPI(0) on LPC1549</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/DMA-for-SPI-0-on-LPC1549/m-p/976120#M38575</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Has anyone got SPI working with DMA on LPC1549 ?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I've written generic setup code that works fine with DMA-USART0 (CH1 for correct peripheral request). Changing to SPI0 it doesn't do anything (CH7, dest =&amp;nbsp;&amp;amp;(LPC_SPI0-&amp;gt;TXDAT)) tried 8,16, and 32 bit transfer size just in case. Nothing. UART works just as expected (dma runs, transfers the byte array to UART tx). I've set the SPI_TXDATCTL_RXIGNORE flag.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I do see in the user manual this:&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;25.7.5 DMA operation&lt;BR /&gt;A DMA request is provided for each SPI direction, and can be used in lieu of interrupts for&lt;BR /&gt;transferring data by configuring the DMA controller appropriately, and enabling the Rx&lt;BR /&gt;and/or Tx DMA via the CFG register. The DMA controller provides an acknowledgement&lt;BR /&gt;signal that clears the related request when it completes handling that request.&lt;BR /&gt;The transmitter DMA request is asserted when Tx DMA is enabled and the transmitter can&lt;BR /&gt;accept more data.&lt;BR /&gt;The receiver DMA request is asserted when Rx DMA is enabled and received data is&lt;BR /&gt;available to be read.&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;But if you look at the CFG register there is nothing defined to enable RX/TX DMA...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance for any help.&lt;/P&gt;&lt;P&gt;Simon.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Extract of test code:&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void initDMA()&lt;BR /&gt;{&lt;BR /&gt; Chip_DMA_Init(LPC_DMA);&lt;BR /&gt; Chip_DMA_Enable(LPC_DMA);&lt;BR /&gt; Chip_DMA_SetSRAMBase(LPC_DMA, DMA_ADDR(Chip_DMA_Table));&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void setupDMATransfer(DMA_CHID_T dmaChannel, volatile void* pPeriphTXAddress)&lt;BR /&gt;{&lt;BR /&gt; Chip_DMA_EnableChannel(LPC_DMA, dmaChannel);&lt;BR /&gt; Chip_DMA_EnableIntChannel(LPC_DMA, dmaChannel);&lt;BR /&gt; Chip_DMA_SetupChannelConfig(LPC_DMA, dmaChannel,&lt;BR /&gt; (DMA_CFG_PERIPHREQEN | DMA_CFG_TRIGBURST_SNGL | DMA_CFG_CHPRIORITY(0)));&lt;/P&gt;&lt;P&gt;dmaDesc.source = DMA_ADDR(&amp;amp;nSPIData[TX_BYTES - 1]);&lt;BR /&gt; dmaDesc.dest = DMA_ADDR(pPeriphTXAddress);&lt;BR /&gt; dmaDesc.next = DMA_ADDR(0);&lt;BR /&gt; dmaDesc.xfercfg = 0;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void DoDMA(DMA_CHID_T dmaChannel)&lt;BR /&gt;{&lt;BR /&gt; uint32_t nCfg = DMA_XFERCFG_CFGVALID | DMA_XFERCFG_SETINTA | DMA_XFERCFG_WIDTH_8&lt;BR /&gt; | DMA_XFERCFG_SRCINC_1 | DMA_XFERCFG_DSTINC_0 | DMA_XFERCFG_XFERCOUNT(TX_BYTES);&lt;/P&gt;&lt;P&gt;dmaDone = 0;&lt;BR /&gt; /* Setup transfer descriptor and validate it */&lt;BR /&gt; Chip_DMA_SetupTranChannel(LPC_DMA, dmaChannel, &amp;amp;dmaDesc);&lt;BR /&gt; Chip_DMA_SetupChannelTransfer(LPC_DMA, dmaChannel, nCfg);&lt;BR /&gt; Chip_DMA_SetValidChannel(LPC_DMA, dmaChannel);&lt;BR /&gt; Chip_DMA_SWTriggerChannel(LPC_DMA, dmaChannel);&lt;/P&gt;&lt;P&gt;// interrupt helper&lt;BR /&gt; dmaCurrentChannel = dmaChannel;&lt;/P&gt;&lt;P&gt;NVIC_EnableIRQ(DMA_IRQn);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;void spiDMARXSync()&lt;BR /&gt;{&lt;BR /&gt; Chip_DMA_EnableChannel(LPC_DMA, DMAREQ_SPI0_RX);&lt;BR /&gt; Chip_DMA_SetupChannelConfig(LPC_DMA, DMAREQ_SPI0_RX,&lt;BR /&gt; (DMA_CFG_PERIPHREQEN | DMA_CFG_TRIGBURST_SNGL | DMA_CFG_CHPRIORITY(1)));&lt;/P&gt;&lt;P&gt;static uint8_t nRXSync;&lt;BR /&gt; static DMA_CHDESC_T rxDesc;&lt;/P&gt;&lt;P&gt;rxDesc.source = DMA_ADDR(LPC_SPI0-&amp;gt;RXDAT);&lt;BR /&gt; rxDesc.dest = DMA_ADDR(&amp;amp;nRXSync);&lt;BR /&gt; rxDesc.next = DMA_ADDR(0);&lt;BR /&gt; rxDesc.xfercfg = 0;&lt;/P&gt;&lt;P&gt;uint32_t nCfg = DMA_XFERCFG_CFGVALID | DMA_XFERCFG_SETINTB | DMA_XFERCFG_WIDTH_8&lt;BR /&gt; | DMA_XFERCFG_SRCINC_0 | DMA_XFERCFG_DSTINC_0 | DMA_XFERCFG_XFERCOUNT(TX_BYTES);&lt;/P&gt;&lt;P&gt;Chip_DMA_SetupTranChannel(LPC_DMA, DMAREQ_SPI0_RX, &amp;amp;rxDesc);&lt;BR /&gt; Chip_DMA_SetupChannelTransfer(LPC_DMA, DMAREQ_SPI0_RX, nCfg);&lt;BR /&gt; Chip_DMA_SetValidChannel(LPC_DMA, DMAREQ_SPI0_RX);&lt;BR /&gt; Chip_DMA_SWTriggerChannel(LPC_DMA, DMAREQ_SPI0_RX);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void setData()&lt;BR /&gt;{&lt;BR /&gt; memset(nSPIData, 0, sizeof(nSPIData));&lt;/P&gt;&lt;P&gt;for (int i = 0; i &amp;lt; TX_BYTES/2; i++)&lt;BR /&gt; {&lt;BR /&gt; nSPIData[i] = 0xFF;&lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void initOutput()&lt;BR /&gt;{&lt;BR /&gt; Chip_GPIO_SetPinDIROutput(LPC_GPIO, 0, LED_PIN_A);&lt;BR /&gt; Chip_GPIO_SetPinDIROutput(LPC_GPIO, 0, LED_PIN_B);&lt;/P&gt;&lt;P&gt;Chip_GPIO_SetPinOutLow(LPC_GPIO, 0, LED_PIN_B);&lt;/P&gt;&lt;P&gt;setData();&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void initSPI()&lt;BR /&gt;{&lt;BR /&gt; Chip_SPI_Init(LPC_SPI0);&lt;BR /&gt; ConfigStruct.Mode = SPI_MODE_MASTER;&lt;BR /&gt; ConfigStruct.ClkDiv = 0xFFFF;&lt;BR /&gt; ConfigStruct.ClockMode = SPI_CLOCK_CPHA0_CPOL0;&lt;BR /&gt; ConfigStruct.DataOrder = SPI_DATA_MSB_FIRST;&lt;BR /&gt; ConfigStruct.SSELPol = SPI_CFG_SPOL0_LO;&lt;BR /&gt; Chip_SPI_SetConfig(LPC_SPI0, &amp;amp;ConfigStruct);&lt;BR /&gt; Chip_SPI_SetControlInfo(LPC_SPI0, 8, SPI_TXDATCTL_RXIGNORE | SPI_TXDATCTL_EOF);&lt;/P&gt;&lt;P&gt;Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);&lt;BR /&gt; Chip_SWM_MovablePinAssign(SWM_UART0_TXD_O, 0xFF);&lt;BR /&gt; Chip_SWM_MovablePinAssign(SWM_SPI0_MOSI_IO, LED_PIN_A);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void initUART()&lt;BR /&gt;{&lt;BR /&gt; Chip_UART_Init(LPC_USART0);&lt;BR /&gt; Chip_Clock_SetUARTBaseClockRate(Chip_Clock_GetMainClockRate(), false);&lt;BR /&gt; Chip_UART_ConfigData(LPC_USART0, UART_CFG_DATALEN_8 | UART_CFG_PARITY_NONE | UART_CFG_STOPLEN_1);&lt;BR /&gt; Chip_UART_SetBaud(LPC_USART0, 1000);&lt;BR /&gt; Chip_UART_Enable(LPC_USART0);&lt;BR /&gt; Chip_UART_TXEnable(LPC_USART0);&lt;/P&gt;&lt;P&gt;Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);&lt;BR /&gt; Chip_SWM_MovablePinAssign(SWM_SPI0_MOSI_IO, 0xFF);&lt;BR /&gt; Chip_SWM_MovablePinAssign(SWM_UART0_TXD_O, LED_PIN_A);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;// direct write to code prove SPI config and that we can output the data and see the LED change&lt;BR /&gt;void pushSPI()&lt;BR /&gt;{&lt;BR /&gt; for (int i = 0; i &amp;lt; TX_BYTES; i++)&lt;BR /&gt; {&lt;BR /&gt; LPC_SPI0-&amp;gt;TXDAT = nSPIData[i];&lt;BR /&gt; while (!(Chip_SPI_GetStatus(LPC_SPI0) &amp;amp; SPI_STAT_TXRDY))&lt;BR /&gt; {&lt;BR /&gt; ;&lt;BR /&gt; }&lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;// dma transfer that should be the same as above&lt;BR /&gt;void dmaSPI()&lt;BR /&gt;{&lt;BR /&gt; setupDMATransfer(DMAREQ_SPI0_TX, &amp;amp;(LPC_SPI0-&amp;gt;TXDAT));&lt;BR /&gt; DoDMA(DMAREQ_SPI0_TX);&lt;BR /&gt; //spiDMARXSync();&lt;/P&gt;&lt;P&gt;// force first byte...&lt;BR /&gt; LPC_SPI0-&amp;gt;TXDAT = 0xff;&lt;/P&gt;&lt;P&gt;while (!dmaDone)&lt;BR /&gt; {&lt;BR /&gt; ;&lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void pushUART()&lt;BR /&gt;{&lt;BR /&gt; for (int i = 0; i &amp;lt; TX_BYTES; i++)&lt;BR /&gt; {&lt;BR /&gt; LPC_USART0-&amp;gt;TXDATA = nSPIData[i];&lt;BR /&gt; while (!(Chip_UART_GetStatus(LPC_USART0) &amp;amp; UART_STAT_TXRDY))&lt;BR /&gt; {&lt;BR /&gt; ;&lt;BR /&gt; }&lt;BR /&gt; }&lt;BR /&gt;}&lt;BR /&gt;void dmaUART()&lt;BR /&gt;{&lt;BR /&gt; setupDMATransfer(DMAREQ_USART0_TX, &amp;amp;(LPC_USART0-&amp;gt;TXDATA));&lt;BR /&gt; DoDMA(DMAREQ_USART0_TX);&lt;/P&gt;&lt;P&gt;while (!dmaDone)&lt;BR /&gt; {&lt;BR /&gt; ;&lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void doDMATest()&lt;BR /&gt;{&lt;BR /&gt; initOutput();&lt;BR /&gt; initDMA();&lt;/P&gt;&lt;P&gt;// test via UART&lt;BR /&gt; //initUART();&lt;BR /&gt; //pushUART();&lt;BR /&gt; //dmaUART();&lt;/P&gt;&lt;P&gt;// test via sPI&lt;BR /&gt; initSPI();&lt;BR /&gt; pushSPI();&lt;BR /&gt; pushSPI();&lt;BR /&gt; pushSPI();&lt;BR /&gt; pushSPI();&lt;BR /&gt; pushSPI();&lt;BR /&gt; dmaSPI();&lt;/P&gt;&lt;P&gt;while (1)&lt;BR /&gt; {&lt;BR /&gt; ;&lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 11 Nov 2019 18:33:42 GMT</pubDate>
    <dc:creator>simonwood</dc:creator>
    <dc:date>2019-11-11T18:33:42Z</dc:date>
    <item>
      <title>DMA for SPI(0) on LPC1549</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/DMA-for-SPI-0-on-LPC1549/m-p/976120#M38575</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Has anyone got SPI working with DMA on LPC1549 ?&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I've written generic setup code that works fine with DMA-USART0 (CH1 for correct peripheral request). Changing to SPI0 it doesn't do anything (CH7, dest =&amp;nbsp;&amp;amp;(LPC_SPI0-&amp;gt;TXDAT)) tried 8,16, and 32 bit transfer size just in case. Nothing. UART works just as expected (dma runs, transfers the byte array to UART tx). I've set the SPI_TXDATCTL_RXIGNORE flag.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I do see in the user manual this:&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;25.7.5 DMA operation&lt;BR /&gt;A DMA request is provided for each SPI direction, and can be used in lieu of interrupts for&lt;BR /&gt;transferring data by configuring the DMA controller appropriately, and enabling the Rx&lt;BR /&gt;and/or Tx DMA via the CFG register. The DMA controller provides an acknowledgement&lt;BR /&gt;signal that clears the related request when it completes handling that request.&lt;BR /&gt;The transmitter DMA request is asserted when Tx DMA is enabled and the transmitter can&lt;BR /&gt;accept more data.&lt;BR /&gt;The receiver DMA request is asserted when Rx DMA is enabled and received data is&lt;BR /&gt;available to be read.&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;But if you look at the CFG register there is nothing defined to enable RX/TX DMA...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance for any help.&lt;/P&gt;&lt;P&gt;Simon.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Extract of test code:&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;void initDMA()&lt;BR /&gt;{&lt;BR /&gt; Chip_DMA_Init(LPC_DMA);&lt;BR /&gt; Chip_DMA_Enable(LPC_DMA);&lt;BR /&gt; Chip_DMA_SetSRAMBase(LPC_DMA, DMA_ADDR(Chip_DMA_Table));&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void setupDMATransfer(DMA_CHID_T dmaChannel, volatile void* pPeriphTXAddress)&lt;BR /&gt;{&lt;BR /&gt; Chip_DMA_EnableChannel(LPC_DMA, dmaChannel);&lt;BR /&gt; Chip_DMA_EnableIntChannel(LPC_DMA, dmaChannel);&lt;BR /&gt; Chip_DMA_SetupChannelConfig(LPC_DMA, dmaChannel,&lt;BR /&gt; (DMA_CFG_PERIPHREQEN | DMA_CFG_TRIGBURST_SNGL | DMA_CFG_CHPRIORITY(0)));&lt;/P&gt;&lt;P&gt;dmaDesc.source = DMA_ADDR(&amp;amp;nSPIData[TX_BYTES - 1]);&lt;BR /&gt; dmaDesc.dest = DMA_ADDR(pPeriphTXAddress);&lt;BR /&gt; dmaDesc.next = DMA_ADDR(0);&lt;BR /&gt; dmaDesc.xfercfg = 0;&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void DoDMA(DMA_CHID_T dmaChannel)&lt;BR /&gt;{&lt;BR /&gt; uint32_t nCfg = DMA_XFERCFG_CFGVALID | DMA_XFERCFG_SETINTA | DMA_XFERCFG_WIDTH_8&lt;BR /&gt; | DMA_XFERCFG_SRCINC_1 | DMA_XFERCFG_DSTINC_0 | DMA_XFERCFG_XFERCOUNT(TX_BYTES);&lt;/P&gt;&lt;P&gt;dmaDone = 0;&lt;BR /&gt; /* Setup transfer descriptor and validate it */&lt;BR /&gt; Chip_DMA_SetupTranChannel(LPC_DMA, dmaChannel, &amp;amp;dmaDesc);&lt;BR /&gt; Chip_DMA_SetupChannelTransfer(LPC_DMA, dmaChannel, nCfg);&lt;BR /&gt; Chip_DMA_SetValidChannel(LPC_DMA, dmaChannel);&lt;BR /&gt; Chip_DMA_SWTriggerChannel(LPC_DMA, dmaChannel);&lt;/P&gt;&lt;P&gt;// interrupt helper&lt;BR /&gt; dmaCurrentChannel = dmaChannel;&lt;/P&gt;&lt;P&gt;NVIC_EnableIRQ(DMA_IRQn);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;void spiDMARXSync()&lt;BR /&gt;{&lt;BR /&gt; Chip_DMA_EnableChannel(LPC_DMA, DMAREQ_SPI0_RX);&lt;BR /&gt; Chip_DMA_SetupChannelConfig(LPC_DMA, DMAREQ_SPI0_RX,&lt;BR /&gt; (DMA_CFG_PERIPHREQEN | DMA_CFG_TRIGBURST_SNGL | DMA_CFG_CHPRIORITY(1)));&lt;/P&gt;&lt;P&gt;static uint8_t nRXSync;&lt;BR /&gt; static DMA_CHDESC_T rxDesc;&lt;/P&gt;&lt;P&gt;rxDesc.source = DMA_ADDR(LPC_SPI0-&amp;gt;RXDAT);&lt;BR /&gt; rxDesc.dest = DMA_ADDR(&amp;amp;nRXSync);&lt;BR /&gt; rxDesc.next = DMA_ADDR(0);&lt;BR /&gt; rxDesc.xfercfg = 0;&lt;/P&gt;&lt;P&gt;uint32_t nCfg = DMA_XFERCFG_CFGVALID | DMA_XFERCFG_SETINTB | DMA_XFERCFG_WIDTH_8&lt;BR /&gt; | DMA_XFERCFG_SRCINC_0 | DMA_XFERCFG_DSTINC_0 | DMA_XFERCFG_XFERCOUNT(TX_BYTES);&lt;/P&gt;&lt;P&gt;Chip_DMA_SetupTranChannel(LPC_DMA, DMAREQ_SPI0_RX, &amp;amp;rxDesc);&lt;BR /&gt; Chip_DMA_SetupChannelTransfer(LPC_DMA, DMAREQ_SPI0_RX, nCfg);&lt;BR /&gt; Chip_DMA_SetValidChannel(LPC_DMA, DMAREQ_SPI0_RX);&lt;BR /&gt; Chip_DMA_SWTriggerChannel(LPC_DMA, DMAREQ_SPI0_RX);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void setData()&lt;BR /&gt;{&lt;BR /&gt; memset(nSPIData, 0, sizeof(nSPIData));&lt;/P&gt;&lt;P&gt;for (int i = 0; i &amp;lt; TX_BYTES/2; i++)&lt;BR /&gt; {&lt;BR /&gt; nSPIData[i] = 0xFF;&lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void initOutput()&lt;BR /&gt;{&lt;BR /&gt; Chip_GPIO_SetPinDIROutput(LPC_GPIO, 0, LED_PIN_A);&lt;BR /&gt; Chip_GPIO_SetPinDIROutput(LPC_GPIO, 0, LED_PIN_B);&lt;/P&gt;&lt;P&gt;Chip_GPIO_SetPinOutLow(LPC_GPIO, 0, LED_PIN_B);&lt;/P&gt;&lt;P&gt;setData();&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void initSPI()&lt;BR /&gt;{&lt;BR /&gt; Chip_SPI_Init(LPC_SPI0);&lt;BR /&gt; ConfigStruct.Mode = SPI_MODE_MASTER;&lt;BR /&gt; ConfigStruct.ClkDiv = 0xFFFF;&lt;BR /&gt; ConfigStruct.ClockMode = SPI_CLOCK_CPHA0_CPOL0;&lt;BR /&gt; ConfigStruct.DataOrder = SPI_DATA_MSB_FIRST;&lt;BR /&gt; ConfigStruct.SSELPol = SPI_CFG_SPOL0_LO;&lt;BR /&gt; Chip_SPI_SetConfig(LPC_SPI0, &amp;amp;ConfigStruct);&lt;BR /&gt; Chip_SPI_SetControlInfo(LPC_SPI0, 8, SPI_TXDATCTL_RXIGNORE | SPI_TXDATCTL_EOF);&lt;/P&gt;&lt;P&gt;Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);&lt;BR /&gt; Chip_SWM_MovablePinAssign(SWM_UART0_TXD_O, 0xFF);&lt;BR /&gt; Chip_SWM_MovablePinAssign(SWM_SPI0_MOSI_IO, LED_PIN_A);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void initUART()&lt;BR /&gt;{&lt;BR /&gt; Chip_UART_Init(LPC_USART0);&lt;BR /&gt; Chip_Clock_SetUARTBaseClockRate(Chip_Clock_GetMainClockRate(), false);&lt;BR /&gt; Chip_UART_ConfigData(LPC_USART0, UART_CFG_DATALEN_8 | UART_CFG_PARITY_NONE | UART_CFG_STOPLEN_1);&lt;BR /&gt; Chip_UART_SetBaud(LPC_USART0, 1000);&lt;BR /&gt; Chip_UART_Enable(LPC_USART0);&lt;BR /&gt; Chip_UART_TXEnable(LPC_USART0);&lt;/P&gt;&lt;P&gt;Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);&lt;BR /&gt; Chip_SWM_MovablePinAssign(SWM_SPI0_MOSI_IO, 0xFF);&lt;BR /&gt; Chip_SWM_MovablePinAssign(SWM_UART0_TXD_O, LED_PIN_A);&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;// direct write to code prove SPI config and that we can output the data and see the LED change&lt;BR /&gt;void pushSPI()&lt;BR /&gt;{&lt;BR /&gt; for (int i = 0; i &amp;lt; TX_BYTES; i++)&lt;BR /&gt; {&lt;BR /&gt; LPC_SPI0-&amp;gt;TXDAT = nSPIData[i];&lt;BR /&gt; while (!(Chip_SPI_GetStatus(LPC_SPI0) &amp;amp; SPI_STAT_TXRDY))&lt;BR /&gt; {&lt;BR /&gt; ;&lt;BR /&gt; }&lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;// dma transfer that should be the same as above&lt;BR /&gt;void dmaSPI()&lt;BR /&gt;{&lt;BR /&gt; setupDMATransfer(DMAREQ_SPI0_TX, &amp;amp;(LPC_SPI0-&amp;gt;TXDAT));&lt;BR /&gt; DoDMA(DMAREQ_SPI0_TX);&lt;BR /&gt; //spiDMARXSync();&lt;/P&gt;&lt;P&gt;// force first byte...&lt;BR /&gt; LPC_SPI0-&amp;gt;TXDAT = 0xff;&lt;/P&gt;&lt;P&gt;while (!dmaDone)&lt;BR /&gt; {&lt;BR /&gt; ;&lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void pushUART()&lt;BR /&gt;{&lt;BR /&gt; for (int i = 0; i &amp;lt; TX_BYTES; i++)&lt;BR /&gt; {&lt;BR /&gt; LPC_USART0-&amp;gt;TXDATA = nSPIData[i];&lt;BR /&gt; while (!(Chip_UART_GetStatus(LPC_USART0) &amp;amp; UART_STAT_TXRDY))&lt;BR /&gt; {&lt;BR /&gt; ;&lt;BR /&gt; }&lt;BR /&gt; }&lt;BR /&gt;}&lt;BR /&gt;void dmaUART()&lt;BR /&gt;{&lt;BR /&gt; setupDMATransfer(DMAREQ_USART0_TX, &amp;amp;(LPC_USART0-&amp;gt;TXDATA));&lt;BR /&gt; DoDMA(DMAREQ_USART0_TX);&lt;/P&gt;&lt;P&gt;while (!dmaDone)&lt;BR /&gt; {&lt;BR /&gt; ;&lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;P&gt;void doDMATest()&lt;BR /&gt;{&lt;BR /&gt; initOutput();&lt;BR /&gt; initDMA();&lt;/P&gt;&lt;P&gt;// test via UART&lt;BR /&gt; //initUART();&lt;BR /&gt; //pushUART();&lt;BR /&gt; //dmaUART();&lt;/P&gt;&lt;P&gt;// test via sPI&lt;BR /&gt; initSPI();&lt;BR /&gt; pushSPI();&lt;BR /&gt; pushSPI();&lt;BR /&gt; pushSPI();&lt;BR /&gt; pushSPI();&lt;BR /&gt; pushSPI();&lt;BR /&gt; dmaSPI();&lt;/P&gt;&lt;P&gt;while (1)&lt;BR /&gt; {&lt;BR /&gt; ;&lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 11 Nov 2019 18:33:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/DMA-for-SPI-0-on-LPC1549/m-p/976120#M38575</guid>
      <dc:creator>simonwood</dc:creator>
      <dc:date>2019-11-11T18:33:42Z</dc:date>
    </item>
    <item>
      <title>Re: DMA for SPI(0) on LPC1549</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/DMA-for-SPI-0-on-LPC1549/m-p/976121#M38576</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Simon,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If you remove the UART portion of your code(comment it out including the initializing). Do you get the same results?&lt;/P&gt;&lt;P&gt;The description of the SPI API routines are described in chpater 39 of the &lt;A href="https://www.nxp.com/docs/en/user-guide/UM10736.pdf"&gt;user manual&lt;/A&gt;. Here you will find two code examples one with dma and one without dma. Here is also described the configuration for the CFG.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Sabina&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 14 Nov 2019 20:40:56 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/DMA-for-SPI-0-on-LPC1549/m-p/976121#M38576</guid>
      <dc:creator>Sabina_Bruce</dc:creator>
      <dc:date>2019-11-14T20:40:56Z</dc:date>
    </item>
    <item>
      <title>Re: DMA for SPI(0) on LPC1549</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/DMA-for-SPI-0-on-LPC1549/m-p/976122#M38577</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Sabina,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I did have a look at the DMA-SPI rom code, but it's far from clear (and written against a slightly different header set, so a lot of work to get it to compile).&lt;/P&gt;&lt;P&gt;Problem is solved, and of course it was me being stupid.&lt;/P&gt;&lt;P&gt;My initSPI code does everything apart from enable the SPI!&lt;/P&gt;&lt;P&gt;Interestingly, the TXRDY bit reads as 1 when not enabled, so the push code appeared to work whilst the DMA did not.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks for your time.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards&lt;/P&gt;&lt;P&gt;Simon.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 15 Nov 2019 22:21:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/DMA-for-SPI-0-on-LPC1549/m-p/976122#M38577</guid>
      <dc:creator>simonwood</dc:creator>
      <dc:date>2019-11-15T22:21:42Z</dc:date>
    </item>
    <item>
      <title>Re: DMA for SPI(0) on LPC1549</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/DMA-for-SPI-0-on-LPC1549/m-p/976123#M38578</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Simon,&lt;/P&gt;&lt;P&gt;I am glad you were able to resolve this. Thanks for posting your resolution as well as this helps us and other customers in the future.&amp;nbsp;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Sabina&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 19 Nov 2019 23:44:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/DMA-for-SPI-0-on-LPC1549/m-p/976123#M38578</guid>
      <dc:creator>Sabina_Bruce</dc:creator>
      <dc:date>2019-11-19T23:44:10Z</dc:date>
    </item>
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