LPC MicrocontrollersのトピックDecision on choosing crystal alongside PLL

Decision on choosing crystal alongside PLL

lpcware — Wed, 15 Jun 2016 17:45:36 GMT

Content originally posted in LPCWare by mohammadyou on Sun Oct 25 05:29:27 MST 2015
I have been told for noisy environments having smaller value of external crystal is better and base on the user manual that says "A smaller value of the PLL N as well as smaller value of M Both result in better PLL operational stability and lower jitter "
now consider these situations :
1- 1 Mhz crystal Fcco=300Mhz Cpu(core)=100Mhz -> M=150 N=1 CPU div =3
2- 10 Mhz crystal Fcco=300Mhz Cpu(core)=100Mhz -> M=15 N=1 CPU div =3
Which configuration do you recommend. Having smaller M and N value or smaller crystal for EMC ?

lower value of Fcco result in lower power dissipation so should I always try to keep it low and it is the best configuration ?

Re: Decision on choosing crystal alongside PLL

lpcware — Wed, 15 Jun 2016 17:45:37 GMT

Content originally posted in LPCWare by MikeSimmonds on Sun Oct 25 07:43:53 MST 2015
I think the data sheet gives additional constraints on the range of (external) crystal speed.
Also in the UM there is a max for the intermediate frequency such that some M for a given
external crystal are too high.

I did an excel spread sheet for the 1778; there are probably similar for the 1768/1769 if
you do a forum search.

EDIT: Also, if you want (or will want) USB, 12MHz is probably a popular choice.

Mike.

Re: Decision on choosing crystal alongside PLL

lpcware — Wed, 15 Jun 2016 17:45:38 GMT

Content originally posted in LPCWare by mohammadyou on Sun Oct 25 08:52:46 MST 2015
Thanks Mike I did calculate those situation by the excel sheet that the site provided for LPC17xx PLL calculation.
the max main oscillator operation is from 1Mhz to 25Mhz. (the constraint on the range of external crystal).
I checked and select all parameters in the range and both of them work correctly.
I want to know which one of them is better in term of noise, jitter?

Re: Decision on choosing crystal alongside PLL

lpcware — Wed, 15 Jun 2016 17:45:38 GMT

Content originally posted in LPCWare by wmues on Mon Oct 26 02:48:11 MST 2015
Using a 12MHz Crystal will give you the best compatibility regarding booting/flashing.

Use a crystal with a low load capacitance. This will lead to low capacitors on the crystal, and this will demand less current from the oscillator. I use a load capacitance of 13pF, which will result in 18pF capacitors. Low power oscillators are more reliable with a crystal with low load capacitance.

Re: Decision on choosing crystal alongside PLL

lpcware — Wed, 15 Jun 2016 17:45:39 GMT

Content originally posted in LPCWare by mohammadyou on Tue Oct 27 07:31:29 MST 2015
Thanks guys