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    <title>topic Re: Dual core allocating space for instructions, data and variables in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Dual-core-allocating-space-for-instructions-data-and-variables/m-p/966302#M38268</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Tom,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I will suggest to check the following posts:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-335283"&gt;Relocating Code and Data Using the MCUXpresso IDE&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/389110"&gt;Relocating code from FLASH to RAM&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This could help you to reallocate code between memories. Also the following thread could help you to know how to place code in different memories.&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/506558"&gt;https://community.nxp.com/thread/506558&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Let me know if this helps you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Alexis Andalon&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 10 Sep 2019 23:14:08 GMT</pubDate>
    <dc:creator>Alexis_A</dc:creator>
    <dc:date>2019-09-10T23:14:08Z</dc:date>
    <item>
      <title>Dual core allocating space for instructions, data and variables</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Dual-core-allocating-space-for-instructions-data-and-variables/m-p/966301#M38267</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm using the MPC55S66 for a new project. This is a dual core and I want to optimally make use of bus and memory structure. So each core it's own code area (flash and sramx) and each it's own working ram.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So my question is how do I setup a project so that:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Core 0 uses:&lt;/P&gt;&lt;P&gt;-&amp;nbsp;FLASH for code and data&lt;/P&gt;&lt;P&gt;- SRAM0 for variables, heap, stack&lt;/P&gt;&lt;P&gt;- USB_SRAM for USB&lt;/P&gt;&lt;P&gt;- SRAM2 shared memory with core 1&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Core 1 uses:&lt;/P&gt;&lt;P&gt;- SRAMX for cade and data&lt;/P&gt;&lt;P&gt;- SRAM1 for variables, heap, stack&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;- SRAM&lt;/SPAN&gt;&lt;SPAN&gt;2&lt;/SPAN&gt;&lt;SPAN&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;shared memory with core 0&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;I've found the &lt;EM&gt;"LPC55xx multicore applications ..."&lt;/EM&gt; manual and all similar online but they didn't completly answer my question. They only seem to answer how to load Core 1 to SRAMX.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;The SDK examples are also not very clear on how to do this.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Thanks!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN&gt;Tom&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 09 Sep 2019 14:23:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Dual-core-allocating-space-for-instructions-data-and-variables/m-p/966301#M38267</guid>
      <dc:creator>dingelen</dc:creator>
      <dc:date>2019-09-09T14:23:00Z</dc:date>
    </item>
    <item>
      <title>Re: Dual core allocating space for instructions, data and variables</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Dual-core-allocating-space-for-instructions-data-and-variables/m-p/966302#M38268</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Dear Tom,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I will suggest to check the following posts:&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/docs/DOC-335283"&gt;Relocating Code and Data Using the MCUXpresso IDE&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/389110"&gt;Relocating code from FLASH to RAM&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;This could help you to reallocate code between memories. Also the following thread could help you to know how to place code in different memories.&lt;/P&gt;&lt;P&gt;&lt;A href="https://community.nxp.com/thread/506558"&gt;https://community.nxp.com/thread/506558&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Let me know if this helps you.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;/P&gt;&lt;P&gt;Alexis Andalon&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 10 Sep 2019 23:14:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Dual-core-allocating-space-for-instructions-data-and-variables/m-p/966302#M38268</guid>
      <dc:creator>Alexis_A</dc:creator>
      <dc:date>2019-09-10T23:14:08Z</dc:date>
    </item>
    <item>
      <title>Re: Dual core allocating space for instructions, data and variables</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Dual-core-allocating-space-for-instructions-data-and-variables/m-p/966303#M38269</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Too bad the RAM allocation is only 32k would be best at 64K min. Also the ability to separate flash banks for true multi MCU&lt;/P&gt;&lt;P&gt;parallel execution from flash.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 16 Sep 2019 01:57:55 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Dual-core-allocating-space-for-instructions-data-and-variables/m-p/966303#M38269</guid>
      <dc:creator>chrisgulick</dc:creator>
      <dc:date>2019-09-16T01:57:55Z</dc:date>
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