LPC MicrocontrollersのトピックEMC_Reset_Disable bit - where is it?

EMC_Reset_Disable bit - where is it?

kbarker — Fri, 23 Aug 2019 07:26:19 GMT

The user manual UM10503 for the LPC43xx microcontrollers, in the External Memory Controller (EMC) chapter mentions the EMC_Reset_Disable bit, which controls whether or not parts of the EMC are reset during a warm reset.

However, there is no information on where the EMC_Reset_Disable bit is.

What is the address of the register that the EMC_Reset_Disable bit is in?

Which bit is it within that register?

What is the default (POR) value of the EMC_Reset_Disable bit?

Re: EMC_Reset_Disable bit - where is it?

soledad — Mon, 23 Sep 2019 15:36:18 GMT

Hi,

Please check the EMC status register.

I hope this helps,

have a nice day!

Regards

Soledad

Re: EMC_Reset_Disable bit - where is it?

kbarker — Tue, 18 Aug 2020 23:57:21 GMT

Thank you for your reply, but it does not answer the question.

The EMC status register is read-only and there's no information on which bit (if any) is the EMC_Reset_Disable bit.

In other microcontrollers, there is (apparently) a ...

"configuration bit in the SCS register, called EMC_Reset_Disable ..."

However, I can't find any information on where this is for the LPC4350.