ENET_SetSMI at 180 MHz for LPC546XX

thorstenwilmer — Sat, 21 Sep 2019 10:18:00 GMT

I'm trying to debug my ethernet phy communication - which does not work yet.

My Core Clock is configured to 180 Mhz, which leads to a divisor of 42 in the following code:

void ENET_SetSMI(ENET_Type *base)
{
uint32_t crDiv;
uint32_t srcClock_Hz = CLOCK_GetCoreSysClkFreq() / 1000000U;

if ((srcClock_Hz >= 20U) && (srcClock_Hz < 35))
{
crDiv = 2;
}
else if ((srcClock_Hz >= 35) && (srcClock_Hz < 60))
{
crDiv = 3;
}
else if ((srcClock_Hz >= 100) && (srcClock_Hz < 150))
{
crDiv = 1;
}
else
{
crDiv = 0;
}

base->MAC_MDIO_ADDR = ENET_MAC_MDIO_ADDR_CR(crDiv);
}

Is this intentional?

The Datasheet allows

0x0 CSR clock = 60-100 MHz; MDC clock = CSR clock/42
0x1 CSR clock = 100-150 MHz; MDC clock = CSR clock/62
0x2 CSR clock = 20-35 MHz; MDC clock = CSR clock/16
0x3 CSR clock = 35-60 MHz; MDC clock = CSR clock/26

So I would expect the test to be inclusive of 150 MHz

else if ((srcClock_Hz >= 100) && (srcClock_Hz <= 150))

Or may be even 180 MHz?

To my surprise this loop is also not left:

base->DMA_MODE |= ENET_DMA_MODE_SWR_MASK;
while (base->DMA_MODE & ENET_DMA_MODE_SWR_MASK)
{
}

I have enabled the following clocks:

CLOCK_EnableClock(kCLOCK_Eth);
CLOCK_EnableClock(kCLOCK_Dma);

And I have called

ENET_SetSMI(ENET);

This command returns 0xFFFF for all PHY Addresses,

PHY_Read(ENET, i, PHY_ID1_REG, &idReg);

so the bus most likely does not work yet, my PHY may be broken or in a not initalized state... Or I have not yet succesfully enable the Ethernet module. I'm using LPC54616 on a custom board with THA1102, so the example code does not work directly.

Re: ENET_SetSMI at 180 MHz for LPC546XX

thorstenwilmer — Sat, 21 Sep 2019 13:19:37 GMT

So I looked with an Logic anylzer onto the MDC/MDIO lines and there is some data. So the Code works, but I don't get a reply.

Most likely I have done a mistake with the TJA1102. The 1V8 Pin is not showing any output and SEL_1V8 is left open, though I expected the LDO to work.

Re: ENET_SetSMI at 180 MHz for LPC546XX

FelipeGarcia — Wed, 25 Sep 2019 22:29:07 GMT

Hi Thorsten,

If the code works correct then probably the TJA1102 is not responding correctly as you mentioned. As I am not expert in this device, I recommend you to submit a question in the following community space.

https://community.nxp.com/community/other

Best regards,

Felipe

topic ENET_SetSMI at 180 MHz for LPC546XX in LPC Microcontrollers

ENET_SetSMI at 180 MHz for LPC546XX

Re: ENET_SetSMI at 180 MHz for LPC546XX

Re: ENET_SetSMI at 180 MHz for LPC546XX