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    <title>LPC MicrocontrollersのトピックRe: LPC1769 Chip_IAP_CopyRamToFlash() flips flash bit from 0 to 1</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-Chip-IAP-CopyRamToFlash-flips-flash-bit-from-0-to-1/m-p/520707#M3779</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by vtw.433e on Fri Jan 08 02:00:35 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;No. It is the nature of the Flash. Virtually all MCU's use this type of on-chip flash. If you want to 'erase' smaller sectors you have to simulate it yourself by copying the original contents, erase, merge with your new data and copy back to flash. Of course, you then have to be careful with number of erase cycles (order 100k on these devices - but check the datasheet)&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 17:46:53 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T17:46:53Z</dc:date>
    <item>
      <title>LPC1769 Chip_IAP_CopyRamToFlash() flips flash bit from 0 to 1</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-Chip-IAP-CopyRamToFlash-flips-flash-bit-from-0-to-1/m-p/520703#M3775</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by gbiagioni on Thu Jan 07 18:20:40 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Below is the 'write to flash' routine I want to use in a Flash Translation Layer for the high half of on-chip flash memory.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Below that is a sample result that shows Chip_IAP_CopyRamToFlash() flipping a bit from 0 to 1, something I thought not possible. Is there a problem with the chip, or can this really happen? My whole FTL strategy relies on being able to &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;re-write 512 byte blocks as long as I only attempt to change 1's to 0's. I've done this successfully with off-chip flash, and&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;am very surprised at what I am seeing here.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;1&amp;nbsp;&amp;nbsp; bool&amp;nbsp; FlashStorage::writeFlashBlock(const void * src, void * dst)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;2&amp;nbsp;&amp;nbsp;&amp;nbsp; uint32_t&amp;nbsp;&amp;nbsp;&amp;nbsp; sector = sectorNumber(dst);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;3&amp;nbsp;&amp;nbsp;&amp;nbsp; bool&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; result;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;4&amp;nbsp;&amp;nbsp;&amp;nbsp; __asm volatile ( " cpsid i \n" );&amp;nbsp;&amp;nbsp; // disable interrupts&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;5&amp;nbsp;&amp;nbsp;&amp;nbsp; result = Chip_IAP_PreSectorForReadWrite(sector, sector) == IAP_CMD_SUCCESS&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;amp;&amp;amp; Chip_IAP_CopyRamToFlash((uint32_t)dst, (uint32_t *)src, FLASH_BLOCK_SIZE) == IAP_CMD_SUCCESS;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;6&amp;nbsp;&amp;nbsp; __asm volatile ( " cpsie i \n" );&amp;nbsp;&amp;nbsp; // enable interrupts&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;7&amp;nbsp;&amp;nbsp;&amp;nbsp; return result;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;line 4 - memory at src (in&amp;nbsp; RAM)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;0x10002EA4&amp;nbsp; 00000000 FFFFFF00 FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x10002EC4&amp;nbsp; FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x10002EE4&amp;nbsp; FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;line 4 - memory at dst (in Flash)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;0x00040000&amp;nbsp; 00000000 FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x00040020&amp;nbsp; FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x00040040&amp;nbsp; FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;line 7 - memory at dst&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;0x00040000&amp;nbsp; 00000400 FFFFFF00 FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x00040020&amp;nbsp; FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x00040040&amp;nbsp; FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF FFFFFFFF&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;'result' is 'true' at line 7&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:46:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-Chip-IAP-CopyRamToFlash-flips-flash-bit-from-0-to-1/m-p/520703#M3775</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:46:50Z</dc:date>
    </item>
    <item>
      <title>Re: LPC1769 Chip_IAP_CopyRamToFlash() flips flash bit from 0 to 1</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-Chip-IAP-CopyRamToFlash-flips-flash-bit-from-0-to-1/m-p/520704#M3776</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by MikeSimmonds on Thu Jan 07 18:33:10 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;The flash embedded in the NXP devices (17xx family at least) is not the same&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;as more conventional NOR flash used in external flash chips.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Incremental programming is NOT possible.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Each unit (probably a 256 byte page but this will be implementation dependant)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;is erased and re-written as a whole.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Hence the apparent 0 to 1 anomaly that you are seeing.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;NB: The documented interface only allows for full sectors to be erased.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;This threw me too at first.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Cheers, Mike.&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:46:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-Chip-IAP-CopyRamToFlash-flips-flash-bit-from-0-to-1/m-p/520704#M3776</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:46:51Z</dc:date>
    </item>
    <item>
      <title>Re: LPC1769 Chip_IAP_CopyRamToFlash() flips flash bit from 0 to 1</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-Chip-IAP-CopyRamToFlash-flips-flash-bit-from-0-to-1/m-p/520705#M3777</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by gbiagioni on Thu Jan 07 18:59:35 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Ouch&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:46:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-Chip-IAP-CopyRamToFlash-flips-flash-bit-from-0-to-1/m-p/520705#M3777</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:46:52Z</dc:date>
    </item>
    <item>
      <title>Re: LPC1769 Chip_IAP_CopyRamToFlash() flips flash bit from 0 to 1</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-Chip-IAP-CopyRamToFlash-flips-flash-bit-from-0-to-1/m-p/520706#M3778</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by gbiagioni on Thu Jan 07 19:51:06 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Oh - is there an undocumented interface that allows me to erase the smaller (256 byte) pages.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:46:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-Chip-IAP-CopyRamToFlash-flips-flash-bit-from-0-to-1/m-p/520706#M3778</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:46:53Z</dc:date>
    </item>
    <item>
      <title>Re: LPC1769 Chip_IAP_CopyRamToFlash() flips flash bit from 0 to 1</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-Chip-IAP-CopyRamToFlash-flips-flash-bit-from-0-to-1/m-p/520707#M3779</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by vtw.433e on Fri Jan 08 02:00:35 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;No. It is the nature of the Flash. Virtually all MCU's use this type of on-chip flash. If you want to 'erase' smaller sectors you have to simulate it yourself by copying the original contents, erase, merge with your new data and copy back to flash. Of course, you then have to be careful with number of erase cycles (order 100k on these devices - but check the datasheet)&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:46:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-Chip-IAP-CopyRamToFlash-flips-flash-bit-from-0-to-1/m-p/520707#M3779</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:46:53Z</dc:date>
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