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    <title>LPC MicrocontrollersのトピックRe: LPC1769 I2S + DMA</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-I2S-DMA/m-p/520666#M3760</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by FrankAndersen on Thu Jan 09 06:52:02 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Well, if you want to make the DMA interupt again, mabye you should create a linked list, so that the DMA continues to run.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Frank&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 17:44:52 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T17:44:52Z</dc:date>
    <item>
      <title>LPC1769 I2S + DMA</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-I2S-DMA/m-p/520663#M3757</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by suja20 on Wed Jan 08 20:47:33 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi, I'm using a LPC1769 with a WM8731 Audio Codec. Right now I'm only testing the transmission and the problem I'm having is that the DMA interrupts once and after that it doesn't interrupt. I think that the configuration part of the I2S is ok, because I checked the signals with a frequency meter and an oscilloscope. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I based most of the code on the cmsis examples.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;This is the DMA Interrupt&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
void DMA_IRQHandler (void)
{
// check GPDMA interrupt on channel 0 TRANSMISION
if (GPDMA_IntGetStatus(GPDMA_STAT_INT, 0)){ //check interrupt status on channel 0
// Check counter terminal status
if(GPDMA_IntGetStatus(GPDMA_STAT_INTTC, 0)){
// Clear terminate counter Interrupt pending
GPDMA_ClearIntPending (GPDMA_STATCLR_INTTC, 0);
Channel0_TC++;
}
// Check error terminal status
if (GPDMA_IntGetStatus(GPDMA_STAT_INTERR, 0)){
// Clear error counter Interrupt pending
GPDMA_ClearIntPending (GPDMA_STATCLR_INTERR, 0);
Channel0_Err++;
}
}
}
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The DMA config, this DMA_Config is not the complete function just to make it easier to read:&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
#define BUFFER_SIZE 1024
uint8_t Channel0_TC = 0;
uint8_t Channel0_Err = 0;
uint8_t buff_tx[BUFFER_SIZE];
uin8_t *I2STXBuffer = buff_tx;

void DMA_Config(void)
{
&amp;nbsp;&amp;nbsp;&amp;nbsp; GPDMA_Init();
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LPC_GPDMA-&amp;gt;DMACConfig = 0x01;

 /* Setting GPDMA interrupt */
&amp;nbsp;&amp;nbsp;&amp;nbsp; // Disable interrupt for DMA
&amp;nbsp;&amp;nbsp;&amp;nbsp; NVIC_DisableIRQ (DMA_IRQn);
&amp;nbsp;&amp;nbsp;&amp;nbsp; /* preemption = 1, sub-priority = 1 */
&amp;nbsp;&amp;nbsp;&amp;nbsp; NVIC_SetPriority(DMA_IRQn, ((0x01&amp;lt;&amp;lt;3)|0x01));

/*
 * Configure GPDMA channel 0 -------------------------------------------------------------
 * Used for I2S Transmit
 */
// Setup GPDMA channel --------------------------------
// channel 0
GPDMACfg.ChannelNum = 0;
// Source memory
GPDMACfg.SrcMemAddr = I2STXBuffer;
// Destination memory
GPDMACfg.DstMemAddr = 0;
// Transfer size
GPDMACfg.TransferSize = BUFFER_SIZE;
// Transfer width - unused
GPDMACfg.TransferWidth = 0;
// Transfer type
GPDMACfg.TransferType = GPDMA_TRANSFERTYPE_M2P;
// Source connection
GPDMACfg.SrcConn = 0;
// Destination connection - unused
GPDMACfg.DstConn = GPDMA_CONN_I2S_Channel_0;
// Linker List Item - unused
GPDMACfg.DMALLI = 0;
GPDMA_Setup(&amp;amp;GPDMACfg);

/* Reset terminal counter */
Channel0_TC = 0;
/* Reset Error counter */
Channel0_Err = 0;

GPDMA_ChannelCmd(0, ENABLE);

// Enable interrupt for DMA
NVIC_EnableIRQ (DMA_IRQn);

I2S_DMAStruct.DMAIndex = I2S_DMA_1;
I2S_DMAStruct.depth = 1;
I2S_DMAConfig(LPC_I2S, &amp;amp;I2S_DMAStruct, I2S_TX_MODE);
}
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;And a main loop, which does basically nothing&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;

&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; I2S_DMACmd(LPC_I2S, I2S_DMA_1, I2S_TX_MODE, ENABLE);
while (1) {
}

&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks in advance, please feel free to ask anything&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:44:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-I2S-DMA/m-p/520663#M3757</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:44:50Z</dc:date>
    </item>
    <item>
      <title>Re: LPC1769 I2S + DMA</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-I2S-DMA/m-p/520664#M3758</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by vostro1000 on Thu Jan 09 03:29:05 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;You need to enable interrupt on dma complete bit at one register that i dont remember and it should work!&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:44:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-I2S-DMA/m-p/520664#M3758</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:44:51Z</dc:date>
    </item>
    <item>
      <title>Re: LPC1769 I2S + DMA</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-I2S-DMA/m-p/520665#M3759</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by suja20 on Thu Jan 09 05:45:52 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks for the answer vostro! But still, I don't quite get what you meant... I'm enabling the IRQ in:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
I2S_DMACmd(LPC_I2S, I2S_DMA_1, I2S_TX_MODE, ENABLE);
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;SPAN&gt;Which according to the cmsis code sets the &lt;/SPAN&gt;&lt;STRONG&gt;tx_dma1_enable&lt;/STRONG&gt;&lt;SPAN&gt; bit in the I2SDMA1 register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;And also I'm enabling the DMA interrupts, which in fact interrupts once:&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
NVIC_EnableIRQ (DMA_IRQn);
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Is there another register which I have to configure?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:44:51 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-I2S-DMA/m-p/520665#M3759</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:44:51Z</dc:date>
    </item>
    <item>
      <title>Re: LPC1769 I2S + DMA</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-I2S-DMA/m-p/520666#M3760</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by FrankAndersen on Thu Jan 09 06:52:02 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Well, if you want to make the DMA interupt again, mabye you should create a linked list, so that the DMA continues to run.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Frank&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:44:52 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-I2S-DMA/m-p/520666#M3760</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:44:52Z</dc:date>
    </item>
    <item>
      <title>Re: LPC1769 I2S + DMA</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-I2S-DMA/m-p/520667#M3761</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by suja20 on Thu Jan 09 15:42:08 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks for the answers!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I think I don't fully understand how the dma linked list work. if I want it to send a buffer continously (once it reaches the end, start from the beggining), is this approach alright?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
DMA_LLI_Struct.SrcAddr = (uint32_t)I2STXBuffer; //buffer
DMA_LLI_Struct.DstAddr = (uint32_t)0; //peripheral
DMA_LLI_Struct.NextLLI = (uint32_t)&amp;amp;DMA_LLI_Struct;
DMA_LLI_Struct.Control = (BUFFER_SIZE)
| (2&amp;lt;&amp;lt;18) //source width 32 bit
| (2&amp;lt;&amp;lt;21) //dest. width 32 bit
| (1&amp;lt;&amp;lt;26) //source increment
| (1&amp;lt;&amp;lt;27)
;
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;SPAN&gt;So the next points to the same.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:44:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-I2S-DMA/m-p/520667#M3761</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:44:53Z</dc:date>
    </item>
    <item>
      <title>Re: LPC1769 I2S + DMA</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-I2S-DMA/m-p/520668#M3762</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by suja20 on Thu Jan 09 19:07:12 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Well i could get it running, however I tried generating a sine wave and I cant hear it correctly. My question is: When does the TX DMA interrupts? Is it when it sends GPDMACfg.TransferSize (in my case 1024) bytes or when it sends I2S_DMAStruct.depth (in my case 15)?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:44:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1769-I2S-DMA/m-p/520668#M3762</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:44:53Z</dc:date>
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