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    <title>LPC MicrocontrollersのトピックCRC setup for enhanced images</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/CRC-setup-for-enhanced-images/m-p/938219#M37367</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Trying to boot a dual boot image with a CRC.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Situation: a firmware update image and a main image.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I swap back and forth by updating the "Boot block structure" version number. [ie if you go to boot mode and change your mind on reboot you will go back to the main image].&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have already setup and booted via dual image without the CRC so that part has been tested.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;More or less I plan to inject the CRC into the Boot block structure after writing the main image to flash.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have setup the main "Boot block structure" like so:&lt;/P&gt;&lt;P&gt;{0xFEEDA5A5, 0x00000000, 0x00000000, 0x8000, 0x00000000, 0x00000003 };&lt;/P&gt;&lt;P&gt;The value 0x8000 is the CRC length&lt;/P&gt;&lt;P&gt;The next index will hold the injected CRC&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I use the LPC's CRC engine to get my CRC.&lt;/P&gt;&lt;P&gt;Here is the setup I used:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; config.polynomial = kCRC_Polynomial_CRC_32;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; config.reverseIn = false;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; config.complementIn = false;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; config.reverseOut = false;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; config.complementOut = false;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; config.seed = 0xFFFFFFFF;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; CRC_Init(CRC_ENGINE, &amp;amp;config);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Problem: On boot the image will no longer load.&amp;nbsp; Assume the CRCs do not match&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Tried different CRC configurations, looked through the manual, online.... found nothing for a guiding light&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;where oh where is that little light of hope.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ps the CRC is suppose to solve the update getting interrupted and [from the customers perspective] bricking the device.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 17 Jun 2019 23:14:39 GMT</pubDate>
    <dc:creator>danander</dc:creator>
    <dc:date>2019-06-17T23:14:39Z</dc:date>
    <item>
      <title>CRC setup for enhanced images</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/CRC-setup-for-enhanced-images/m-p/938219#M37367</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Trying to boot a dual boot image with a CRC.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Situation: a firmware update image and a main image.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I swap back and forth by updating the "Boot block structure" version number. [ie if you go to boot mode and change your mind on reboot you will go back to the main image].&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have already setup and booted via dual image without the CRC so that part has been tested.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;More or less I plan to inject the CRC into the Boot block structure after writing the main image to flash.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have setup the main "Boot block structure" like so:&lt;/P&gt;&lt;P&gt;{0xFEEDA5A5, 0x00000000, 0x00000000, 0x8000, 0x00000000, 0x00000003 };&lt;/P&gt;&lt;P&gt;The value 0x8000 is the CRC length&lt;/P&gt;&lt;P&gt;The next index will hold the injected CRC&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I use the LPC's CRC engine to get my CRC.&lt;/P&gt;&lt;P&gt;Here is the setup I used:&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; config.polynomial = kCRC_Polynomial_CRC_32;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; config.reverseIn = false;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; config.complementIn = false;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; config.reverseOut = false;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; config.complementOut = false;&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; config.seed = 0xFFFFFFFF;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; CRC_Init(CRC_ENGINE, &amp;amp;config);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Problem: On boot the image will no longer load.&amp;nbsp; Assume the CRCs do not match&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Tried different CRC configurations, looked through the manual, online.... found nothing for a guiding light&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;where oh where is that little light of hope.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;ps the CRC is suppose to solve the update getting interrupted and [from the customers perspective] bricking the device.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 17 Jun 2019 23:14:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/CRC-setup-for-enhanced-images/m-p/938219#M37367</guid>
      <dc:creator>danander</dc:creator>
      <dc:date>2019-06-17T23:14:39Z</dc:date>
    </item>
    <item>
      <title>Re: CRC setup for enhanced images</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/CRC-setup-for-enhanced-images/m-p/938220#M37368</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For an image to be Dual Enhanced, it needs to have the Dual Enhanced image marker&amp;nbsp;value (0x0FFEB6B6) at offset 0x24. It must also have a valid image header in the image pointed to at offset 0x28.&lt;/P&gt;&lt;P&gt;One of the images must start at sector 0. The other image must be aligned on a sector boundary and linked to run at the sector start address where the image is programmed. Either image can have optional new event handler table (256-Words aligned).&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For Dual Enhanced image creation, two standalone images (Image1, Image2) should be created. The Image1 and Image2 has below arguments for CRC calculation.&lt;/P&gt;&lt;P&gt;IMAGE1 starts at FLASH sector 0&lt;/P&gt;&lt;P&gt;BOOTADDR = 0 (For all Single Enhanced image)&lt;/P&gt;&lt;P&gt;IMAGEHEADEROFFSET = 0x124 (Depict in address 0x28, ImageHeader offset)&lt;/P&gt;&lt;P&gt;IMAGE2 starts at FLASH sector X (e.g. 0x8000)&lt;/P&gt;&lt;P&gt;BOOTADDR = SECTOR X start&lt;/P&gt;&lt;P&gt;IMAGEHEADEROFFSET = BOOTADDR + 0x124 (Depict in address BOOTADDR + 0x28)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Based on legacy image creation, three additional steps are required to create a Single Enhanced image.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;1.&amp;nbsp;Add enhanced image flag&lt;/P&gt;&lt;P&gt;For Single Enhanced image, the boot address is 0, the enhanced image flag is at 0x24 and the pointer to image header is at 0x28.&lt;/P&gt;&lt;P&gt;&amp;nbsp;In MCUXPRESSO SDK project, these values can be edited in file “startup_LPC54608.s”.&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_7.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/89561i7F99FCEC91824CC5/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_7.png" alt="pastedImage_7.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;2.&amp;nbsp;Add Single Enhanced image header&lt;/P&gt;&lt;P&gt;Add Single Enhanced image header at end of ISR vector table in file “startup_LPC54608.s”&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_6.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/89573i676021D1E22AE12F/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_6.png" alt="pastedImage_6.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;3.&amp;nbsp;Processing Single Enhanced image.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;For Dual Enhanced image creation,&amp;nbsp;&amp;nbsp;Image1 creation procedures are similar to the Single Enhanced image creation which below has three steps, additional there are minor differences in step 1 and 2 as shown&amp;nbsp;following figures.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_5.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/89574iA9582685524FF404/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_5.png" alt="pastedImage_5.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_8.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/89584i281A8B1938B36767/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_8.png" alt="pastedImage_8.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;1. The image marker is 0x0FFEB6B6 in Dual Enhanced image.&lt;/P&gt;&lt;P&gt;2. Version information in image header is applicable.&lt;/P&gt;&lt;P&gt;As of Image2 creation, it can follow the procedures of Image1 creation to set up image flag and image marker. Moreover, as the BOOTADDR of Image2 is not 0 but FLASH sector X boundary, linker script changes are required.&lt;/P&gt;&lt;P&gt;The linker script file is “LPC54608J512_flash.scf” (KEIL) and in “lpc54608J512_flash.icf” (IAR). The address of m_interrupts_start should be set to BOOTADDR and other defined symbol should move forward in sequence.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I hope this helps,&amp;nbsp;&lt;/P&gt;&lt;P&gt;Regards&amp;nbsp;&lt;/P&gt;&lt;P&gt;Sol&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 24 Jun 2019 15:20:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/CRC-setup-for-enhanced-images/m-p/938220#M37368</guid>
      <dc:creator>soledad</dc:creator>
      <dc:date>2019-06-24T15:20:08Z</dc:date>
    </item>
    <item>
      <title>Re: CRC setup for enhanced images</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/CRC-setup-for-enhanced-images/m-p/938221#M37369</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you for for the great reply.&amp;nbsp; I feel bad as I should have made my post and problem clearer.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have the dual boot working without any CRC.&amp;nbsp; The problem I am having is when I enable the CRC the main image will no longer boot.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is the process.&lt;/P&gt;&lt;P&gt;1. MICRO boots to first image the "update image"&lt;/P&gt;&lt;P&gt;2. The update image loads the main image into the 0x10000 flash sector&lt;/P&gt;&lt;P&gt;When I have no CRC setup in the main image header everything works. ie on reboot we boot to the main image&lt;/P&gt;&lt;P&gt;3. To setup the CRC I use the 54606 internal CRC engine to generate a CRC starting at address 0x10000.&lt;/P&gt;&lt;P&gt;I then setup the main header with the CRC information.&amp;nbsp; The main header resides outside of what I CRC, so that is not a worry.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So the core problem is that updating the main header with CRC information causes the main image to not boot.&lt;/P&gt;&lt;P&gt;I am assuming that image does not boot due to CRC mismatch.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My assumptions:&lt;/P&gt;&lt;P&gt;The boot CRC uses the same internal 54606 CRC engine I am using [so it should be simple to make a matching CRC...].&lt;/P&gt;&lt;P&gt;The start address for the boot CRC is the start of my image ie 0x10000&lt;/P&gt;&lt;P&gt;The size of what I tell boot to CRC and what I tell the CRC engine to CRC are the same ie not off by 1 due to some nuance of operation.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If these assumptions are true the CRC mismatch should be a result of me setting up the CRC engine different than the boot.&lt;/P&gt;&lt;P&gt;For example: I assume the boot uses a Polynomial_CRC_32 not a 16 polynomial and that the seed is 0xFFFFFFFF.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I could not find any documentation that would tell me how the boot calculates the CRC on a image.&lt;/P&gt;&lt;P&gt;I did find documentation on size, stating location, and setting up the header for the boot CRC.&lt;/P&gt;&lt;P&gt;main header is setup like so:&lt;/P&gt;&lt;P&gt;//dual image&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ,use crc&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ,na&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; ,crc size ,crc value&amp;nbsp; ,version number&lt;/P&gt;&lt;P&gt;{0xFEEDA5A5, 0x00000000, 0x00000000, 0x8000, 0x00000000, 0x00000003 };&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 26 Jun 2019 19:05:00 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/CRC-setup-for-enhanced-images/m-p/938221#M37369</guid>
      <dc:creator>danander</dc:creator>
      <dc:date>2019-06-26T19:05:00Z</dc:date>
    </item>
    <item>
      <title>Re: CRC setup for enhanced images</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/CRC-setup-for-enhanced-images/m-p/938222#M37370</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Please check the chapter&amp;nbsp;18.6.4 "Plain Load Image" of the&amp;nbsp;MCUXpresso IDE User Guide attached to this.&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;I hope this helps,&amp;nbsp;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Regards&amp;nbsp;&lt;/P&gt;&lt;P style="color: #51626f; background-color: #ffffff; border: 0px;"&gt;Sol&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 04 Jul 2019 16:21:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/CRC-setup-for-enhanced-images/m-p/938222#M37370</guid>
      <dc:creator>soledad</dc:creator>
      <dc:date>2019-07-04T16:21:04Z</dc:date>
    </item>
    <item>
      <title>Re: CRC setup for enhanced images</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/CRC-setup-for-enhanced-images/m-p/938223#M37371</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I did not see anything dealing with the image CRC in that section.&lt;/P&gt;&lt;P&gt;But I have managed to work around my problem.&amp;nbsp;&lt;/P&gt;&lt;P&gt;By setting the "update image" to the highest version until the main image has been loaded and verified valid via a software MD5 check.&amp;nbsp; Should the download of the main firmware complete, be programmed into flash, and pass the MD5 check I set the main firmware to the highest version number, thus allowing main to load on boot.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 Jul 2019 21:49:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/CRC-setup-for-enhanced-images/m-p/938223#M37371</guid>
      <dc:creator>danander</dc:creator>
      <dc:date>2019-07-05T21:49:33Z</dc:date>
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