topic Re: FreeRTOS LCP55S69 i2c slave pull clock low in LPC Microcontrollers

FreeRTOS LCP55S69 i2c slave pull clock low

zoltan_balogh_e — Tue, 16 Jul 2019 09:52:47 GMT

Hi,

I have FreeRTOS on LPC55S69 and use i2c in salve mode. As far as I know when master initiates a read over i2c and data on the slave is not ready, then the slave can pull low the clock until data gets ready then release it and let the master read it.
Is there a way to do this in FreeRTOS?

Is this possible when i2c slave NonBlocking mode is used?

Thanks,

Zoltan

Re: FreeRTOS LCP55S69 i2c slave pull clock low

Alexis_A — Thu, 18 Jul 2019 16:30:05 GMT

Hi zoltan.balogh.eth@gmail.com‌,

This delay is called clock streching and the I2C module of the LPC55S6x is capable of do it without software intervention, for example, this is a capture of the I2C signal using the freertos_i2x example from the SDK:

Adding a delay between transmissions will not affect the communication and the clock will stay low until the next transmission:

Best Regard,

Alexis Andalon

Re: FreeRTOS LCP55S69 i2c slave pull clock low

zoltan_balogh_e — Fri, 19 Jul 2019 13:01:29 GMT

Hi nxf46116‌,

Thank you for your reply! I still have some questions.

- In your capture the address + r/w bit is 252, which may mean master write to slave at address 0x7e. I don't know if it makes a big difference, but I was talking about master from slave read, when slave should keep the clock low as long as a buffer with data is not available.
- Where should the delay be added in the code? I guess not to he i2c slave callback, because of that's called from an ISR.

Best regards,

Zoltan

Re: FreeRTOS LCP55S69 i2c slave pull clock low

Alexis_A — Fri, 19 Jul 2019 15:20:48 GMT

Hi zoltan.balogh.eth@gmail.com‌,

-The 252 (0x7E) is the slave address, not the address that will read the master.

-I added the delay in the FLEXCOMM4 IRQ, if you add a delay in the callback this will not affect the communication.

I hope this helps you.

Best Regards,

Alexis Andalon