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    <title>LPC Microcontrollers中的主题 Re: LPC546xx I2S DMA</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-I2S-DMA/m-p/886125#M35521</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;SPAN class=""&gt;&lt;A _jive_internal="true" data-content-finding="Community" data-userid="213424" data-username="jeremyzhou" href="https://community.nxp.com/people/jeremyzhou"&gt;jeremyzhou&lt;/A&gt;&lt;/SPAN&gt;.&lt;/P&gt;&lt;P&gt;Thank you for your reply. Yes, you are right the DMA wouldn't stop even if the description exhaust. I have done a test with handling of an interrupt flag that indicate the completion of DMA transferring.&lt;/P&gt;&lt;P&gt;void DMA0_DriverIRQHandler(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (I2S_DMA-&amp;gt;COMMON[0].INTA &amp;amp; (1U &amp;lt;&amp;lt; I2S_DMA_TX_CHANNEL))&amp;nbsp; // Channel uses INTA flag&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; I2S_DMA-&amp;gt;COMMON[0].INTA |= (1U &amp;lt;&amp;lt; I2S_DMA_TX_CHANNEL);&amp;nbsp; // Clear INTA flag&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;But DMA still continue to send data to I2S.&lt;/P&gt;&lt;P&gt;Could you explain a little bit when you are talking about it seems impossible ?&lt;/P&gt;&lt;P&gt;Have a great day, Serhii.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 11 Feb 2019 06:56:44 GMT</pubDate>
    <dc:creator>sergeylozhechka</dc:creator>
    <dc:date>2019-02-11T06:56:44Z</dc:date>
    <item>
      <title>LPC546xx I2S DMA</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-I2S-DMA/m-p/886123#M35519</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi everyone.&lt;/P&gt;&lt;P&gt;Could you explain me next problem.&lt;/P&gt;&lt;P&gt;I try to use "Single buffer" mode for DMA&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;15.5.3 Single buffer&lt;BR /&gt;This generally applies to memory to memory moves, and peripheral DMA that occurs only&lt;BR /&gt;occasionally and is set up for each transfer. For this kind of operation, only the initial&lt;BR /&gt;channel descriptor shown in Table 305 is needed.&lt;BR /&gt;This case is identified by the Reload bit in the XFERCFG register = 0. When the DMA&lt;BR /&gt;channel receives a DMA request or trigger (depending on how it is configured), it performs&lt;BR /&gt;one or more transfers as configured, then stops. Once the channel descriptor is&lt;BR /&gt;exhausted, additional DMA requests or triggers will have no effect until the channel&lt;BR /&gt;configuration is updated by software.&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;So in this case I don not set reload bit in XFERCFGn register but after XFERCOUNT got&amp;nbsp; = 0x3FF &lt;STRONG&gt;DMA still continue to send data to I2S.&lt;/STRONG&gt; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thank you, Serhii.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 06 Feb 2019 10:22:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-I2S-DMA/m-p/886123#M35519</guid>
      <dc:creator>sergeylozhechka</dc:creator>
      <dc:date>2019-02-06T10:22:28Z</dc:date>
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    <item>
      <title>Re: LPC546xx I2S DMA</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-I2S-DMA/m-p/886124#M35520</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A _jive_internal="true" data-content-finding="Community" data-userid="283910" data-username="sergeylozhechka" href="https://community.nxp.com/people/sergeylozhechka"&gt;Sergey Lozhechka&lt;/A&gt;,&lt;/P&gt;&lt;P&gt;Thank you for your interest in NXP Semiconductor products and for the opportunity to serve you.&lt;BR /&gt;In my opinion, it seems impossible.&lt;BR /&gt;According to your description, the DMA wouldn't stop even if the description exhaust, is it right?&lt;BR /&gt;Whether you try to set an interrupt flag to indicate the completion of DMA transferring.&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 11 Feb 2019 02:23:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-I2S-DMA/m-p/886124#M35520</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2019-02-11T02:23:38Z</dc:date>
    </item>
    <item>
      <title>Re: LPC546xx I2S DMA</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-I2S-DMA/m-p/886125#M35521</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;SPAN class=""&gt;&lt;A _jive_internal="true" data-content-finding="Community" data-userid="213424" data-username="jeremyzhou" href="https://community.nxp.com/people/jeremyzhou"&gt;jeremyzhou&lt;/A&gt;&lt;/SPAN&gt;.&lt;/P&gt;&lt;P&gt;Thank you for your reply. Yes, you are right the DMA wouldn't stop even if the description exhaust. I have done a test with handling of an interrupt flag that indicate the completion of DMA transferring.&lt;/P&gt;&lt;P&gt;void DMA0_DriverIRQHandler(void)&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (I2S_DMA-&amp;gt;COMMON[0].INTA &amp;amp; (1U &amp;lt;&amp;lt; I2S_DMA_TX_CHANNEL))&amp;nbsp; // Channel uses INTA flag&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;BR /&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; I2S_DMA-&amp;gt;COMMON[0].INTA |= (1U &amp;lt;&amp;lt; I2S_DMA_TX_CHANNEL);&amp;nbsp; // Clear INTA flag&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;But DMA still continue to send data to I2S.&lt;/P&gt;&lt;P&gt;Could you explain a little bit when you are talking about it seems impossible ?&lt;/P&gt;&lt;P&gt;Have a great day, Serhii.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 11 Feb 2019 06:56:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-I2S-DMA/m-p/886125#M35521</guid>
      <dc:creator>sergeylozhechka</dc:creator>
      <dc:date>2019-02-11T06:56:44Z</dc:date>
    </item>
    <item>
      <title>Re: LPC546xx I2S DMA</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-I2S-DMA/m-p/886126#M35522</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;SPAN class=""&gt;&lt;A _jive_internal="true" data-content-finding="Community" data-userid="283910" data-username="sergeylozhechka" href="https://community.nxp.com/people/sergeylozhechka"&gt;Sergey Lozhechka&lt;/A&gt;&lt;/SPAN&gt;,&lt;/P&gt;&lt;P&gt;Thanks for your reply.&lt;BR /&gt;It seems a bit weird, I also have no idea with this phenomenon now.&lt;BR /&gt;So I was wondering if you can share a compile-able single buffer demo and share it with me.&lt;BR /&gt;In addition, this demo had better do a memory-to-memory move, as it can make me debug easily.&lt;/P&gt;&lt;P&gt;TIC&lt;/P&gt;&lt;P style="min- padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Feb 2019 01:25:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-I2S-DMA/m-p/886126#M35522</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2019-02-12T01:25:28Z</dc:date>
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