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    <title>LPC MicrocontrollersのトピックMASTER_RST and PERIPH_RST on LPC1853</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/MASTER-RST-and-PERIPH-RST-on-LPC1853/m-p/885188#M35471</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have observed different behavior between LPC1853 MCUs built in different years. They are all revision 'A'. I will list two MCUs here for comparison:&lt;/P&gt;&lt;P&gt;1) LPC1853FET256 ESD15300A&lt;/P&gt;&lt;P&gt;2) LPC1853FET256 ESD17010A&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The first one was manufactured in 2015 week 30, and the second one in 2017 week 1. The difference in behavior is with regards to GPIO P5_3 (T8). There might be other GPIO that is affected, but I am focusing on this pin for this discussion. On the first MCU, when LPC_RGU-&amp;gt;RESET_CTRL0's bit 1 (PERIPH_RST) is set, T8 is not affected. On the second MCU, when LPC_RGU-&amp;gt;RESET_CTRL0's bit 1 is set, T8 is pulled low by the MCU.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Looking at the errata (ES_LPC185X_3X_2X_1X_FLASH) for this MCU, RESET.2 states this:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;Problem:&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;On the LPC18xx, PERIPH_RST is not functional. CMSIS call NVIC_SystemReset() uses&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;PERIPH_RST internally and is also non-functional.&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Work-around:&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;There is no work-around. To reset the entire chip, use the CORE_RST instead of using&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;CMSIS call NVIC_SystemReset() or PERIPH_RST.&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My first question is:&lt;/P&gt;&lt;P&gt;What does 'not functional' mean? I could see the MCU reset when PERIPH_RST is set. There is a difference in behavior depending on the manufacture date though.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is Table 154 from UM10430:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/66544i760DFE742C7FB3F4/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;My second question:&lt;/P&gt;&lt;P&gt;If I do not want any GPIO to change state during MCU reset, could I use MASTER_RST?&lt;/P&gt;&lt;P&gt;The errata (RESET.1) also says to not use it:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;Problem:&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;On the LPC18xx, MASTER_RST and M3_RST are not functional.&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Work-around:&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;There is no work-around. To reset the entire chip use the CORE_RST instead of using&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;MASTER_RST or M3_RST.&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My third question: Is PERIPH_RST or MASTER_RST safe to use in any revision 'A' LPC1853?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;RESET.1 in the errata also says MASTER_RST is not functional. I hope someone could help clarify what this means, as I observed the MCU reset without changing the state of T8 when MASTER_RST is used on both the above MCUs.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any help would be greatly appreciated.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 05 Feb 2019 18:19:32 GMT</pubDate>
    <dc:creator>rex_lam</dc:creator>
    <dc:date>2019-02-05T18:19:32Z</dc:date>
    <item>
      <title>MASTER_RST and PERIPH_RST on LPC1853</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/MASTER-RST-and-PERIPH-RST-on-LPC1853/m-p/885188#M35471</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have observed different behavior between LPC1853 MCUs built in different years. They are all revision 'A'. I will list two MCUs here for comparison:&lt;/P&gt;&lt;P&gt;1) LPC1853FET256 ESD15300A&lt;/P&gt;&lt;P&gt;2) LPC1853FET256 ESD17010A&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The first one was manufactured in 2015 week 30, and the second one in 2017 week 1. The difference in behavior is with regards to GPIO P5_3 (T8). There might be other GPIO that is affected, but I am focusing on this pin for this discussion. On the first MCU, when LPC_RGU-&amp;gt;RESET_CTRL0's bit 1 (PERIPH_RST) is set, T8 is not affected. On the second MCU, when LPC_RGU-&amp;gt;RESET_CTRL0's bit 1 is set, T8 is pulled low by the MCU.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Looking at the errata (ES_LPC185X_3X_2X_1X_FLASH) for this MCU, RESET.2 states this:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;Problem:&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;On the LPC18xx, PERIPH_RST is not functional. CMSIS call NVIC_SystemReset() uses&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;PERIPH_RST internally and is also non-functional.&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Work-around:&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;There is no work-around. To reset the entire chip, use the CORE_RST instead of using&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;CMSIS call NVIC_SystemReset() or PERIPH_RST.&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My first question is:&lt;/P&gt;&lt;P&gt;What does 'not functional' mean? I could see the MCU reset when PERIPH_RST is set. There is a difference in behavior depending on the manufacture date though.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Here is Table 154 from UM10430:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/66544i760DFE742C7FB3F4/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;My second question:&lt;/P&gt;&lt;P&gt;If I do not want any GPIO to change state during MCU reset, could I use MASTER_RST?&lt;/P&gt;&lt;P&gt;The errata (RESET.1) also says to not use it:&lt;/P&gt;&lt;P&gt;&lt;EM&gt;Problem:&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;On the LPC18xx, MASTER_RST and M3_RST are not functional.&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;Work-around:&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;There is no work-around. To reset the entire chip use the CORE_RST instead of using&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;MASTER_RST or M3_RST.&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My third question: Is PERIPH_RST or MASTER_RST safe to use in any revision 'A' LPC1853?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;RESET.1 in the errata also says MASTER_RST is not functional. I hope someone could help clarify what this means, as I observed the MCU reset without changing the state of T8 when MASTER_RST is used on both the above MCUs.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Any help would be greatly appreciated.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 05 Feb 2019 18:19:32 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/MASTER-RST-and-PERIPH-RST-on-LPC1853/m-p/885188#M35471</guid>
      <dc:creator>rex_lam</dc:creator>
      <dc:date>2019-02-05T18:19:32Z</dc:date>
    </item>
    <item>
      <title>Re: MASTER_RST and PERIPH_RST on LPC1853</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/MASTER-RST-and-PERIPH-RST-on-LPC1853/m-p/885189#M35472</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;Hi Rex Lam,&lt;/P&gt;&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;I understand that you might be seen this behavior for this MCU, but we can't assure that this behavior will always be present and how long will it last.&lt;/P&gt;&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;Sorry for the inconvenience this might cause you.&lt;/P&gt;&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;Best Regards,&lt;/P&gt;&lt;P style="margin: 0in; font-family: Calibri; font-size: 11.0pt;"&gt;Alexis Andalon&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Feb 2019 21:09:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/MASTER-RST-and-PERIPH-RST-on-LPC1853/m-p/885189#M35472</guid>
      <dc:creator>Alexis_A</dc:creator>
      <dc:date>2019-02-12T21:09:26Z</dc:date>
    </item>
    <item>
      <title>Re: MASTER_RST and PERIPH_RST on LPC1853</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/MASTER-RST-and-PERIPH-RST-on-LPC1853/m-p/885190#M35473</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks for the reply Alexis. I appreciate the information.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 12 Feb 2019 22:49:50 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/MASTER-RST-and-PERIPH-RST-on-LPC1853/m-p/885190#M35473</guid>
      <dc:creator>rex_lam</dc:creator>
      <dc:date>2019-02-12T22:49:50Z</dc:date>
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