LPC MicrocontrollersのトピックRe: External SRAM data handling issue

External SRAM data handling issue

priyankb — Fri, 05 Apr 2019 12:13:08 GMT

Hello,

I am facing some trouble related to data handling in the external SRAM(Cypress) which is a 16-bit 1MB SRAM interfaced with LPC4088 using EMC.

I use many structures with mixed data types inside. So many times after writing to SRAM, I read garbage(improper) data. Has anyone ever came across such problem?

Thanks

Priyank

Re: External SRAM data handling issue

Alexis_A — Tue, 09 Apr 2019 21:00:39 GMT

Hi Priyank,

Could you share how you set the EMC module?

Best Regards,

Alexis Andalon

Re: External SRAM data handling issue

priyankb — Mon, 02 Nov 2020 14:19:35 GMT

Hi Alexis,

The SRAM configuration I used is

STATIC const IP_EMC_STATIC_CONFIG_T SRAM_config = {
 1,
 EMC_STATIC_CONFIG_MEM_WIDTH_16 |
 EMC_STATIC_CONFIG_CS_POL_ACTIVE_LOW |
 EMC_STATIC_CONFIG_BLS_HIGH /* |
             EMC_CONFIG_BUFFER_ENABLE*/,
 EMC_NANOSECOND(35),
 EMC_NANOSECOND(5),
 EMC_NANOSECOND(45),
 EMC_NANOSECOND(0),
 EMC_NANOSECOND(45),
 EMC_CLOCK(0)

};‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

I have attached the pin connection diagram as well. The only fault I see is that A0 of EMC(LPC4088) is connected to A0 of SRAM. Instead A1 of LPC4088 should be connected to A0 of SRAM.

Re: External SRAM data handling issue

converse — Wed, 10 Apr 2019 09:43:24 GMT

Have you considered that it could be you have a bug that is causing your code to overwrite the data?

Re: External SRAM data handling issue

priyankb — Wed, 10 Apr 2019 10:51:49 GMT

To check that I have created a small program in which I just read & write structure in SRAM. Still unable to read correctly.

Re: External SRAM data handling issue

Alexis_A — Thu, 11 Apr 2019 21:28:41 GMT

Hi Priyank,

With this information I think the problem could be in the layout, please check the next application note, there's some consideration you need to have in the layout of the board.

https://www.nxp.com/docs/en/application-note/AN2582.pdf

You also could try writting a location and after that reading this multiple times and comparing if its the same information, maybe some module around the memory is causing noise.

Let me know your findings.

Best Regards,

Alexis Andalon

Re: External SRAM data handling issue

priyankb — Fri, 12 Apr 2019 13:07:17 GMT

Hi Alexis,

I read the Application note you suggested. It is related to DDR RAM while I am using SDR RAM.

The second thing you asked to tryout is the data retention test. Data read is correct even when hundreds of times I read it.

I also came across an embedded board based on Atmel IC which uses the same SRAM as I am using & the only difference between that & mine is the address shift.

In their schematic: A1 of Atmel is connected to A0 of SRAM.

In my case: A0 of LPC4088 is connected to A0 of SRAM.

I am attaching Atmel board's schematic for the reference.

So now I am trying to change this & see if that works.

Thanks & Regards

Priyank.