https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-mismatch-between-SDK-and-UM10912-static-and-dynamic/m-p/880054#M35149 <HTML><HEAD></HEAD><BODY><P>Hi, Daniel,</P><P></P><P>The UM10912 description is correct.</P><P>Hope it can help you</P><P>BR</P><P>XiangJun Rong</P><P><span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"><img src="https://community.nxp.com/t5/image/serverpage/image-id/75169i8FBAAC44151D0922/image-size/large?v=v2&amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /></span></P></BODY></HTML> Thu, 21 Feb 2019 08:44:57 GMT xiangjun_rong 2019-02-21T08:44:57Z https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-mismatch-between-SDK-and-UM10912-static-and-dynamic/m-p/880053#M35148 <HTML><HEAD></HEAD><BODY><P>Hi NXP community</P><P></P><P>I am using LPC546xx and have found a mismatch between the SDK 2.5.0 and User Manual UM10912 concerning static and dynamic memory regions depending on Cip Select:</P><P></P><P>Static Memory Chip Select Base address</P><P>CS0: 0x8000'000 (UM10912) vs 0x8000'0000 (SDK)</P><P>CS1: 0x<EM><STRONG>88</STRONG></EM>00'000&nbsp;(UM10912) vs 0x<EM><STRONG>90</STRONG></EM>00'0000 (SDK)</P><P>CS2: 0x<EM><STRONG>90</STRONG></EM>00'000&nbsp;(UM10912) vs 0x<EM><STRONG>98</STRONG></EM>00'0000 (SDK)</P><P>CS3: 0x<EM><STRONG>98</STRONG></EM>00'000&nbsp;(UM10912) vs 0x<EM><STRONG>9C</STRONG></EM>00'0000 (SDK)</P><P></P><P>Dynamic Memory Chip Select Base address</P><P>CS0: 0xA000'000 (UM10912) vs 0xA000'0000 (SDK)</P><P>CS1: 0x<EM><STRONG>A8</STRONG></EM>00'000&nbsp;(UM10912) vs 0x<EM><STRONG>B0</STRONG></EM>00'0000 (SDK)</P><P>CS2: 0x<EM><STRONG>B0</STRONG></EM>00'000&nbsp;(UM10912) vs 0x<EM><STRONG>C0</STRONG></EM>00'0000 (SDK)</P><P>CS3: 0x<EM><STRONG>B8</STRONG></EM>00'000&nbsp;(UM10912) vs 0x<EM><STRONG>D0</STRONG></EM>00'0000 (SDK)</P><P></P><P>Which one is the correct one? SDK or User Manual?</P><P></P><P>Dani</P></BODY></HTML> Thu, 21 Feb 2019 07:54:47 GMT https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-mismatch-between-SDK-and-UM10912-static-and-dynamic/m-p/880053#M35148 danielgull 2019-02-21T07:54:47Z https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-mismatch-between-SDK-and-UM10912-static-and-dynamic/m-p/880054#M35149 <HTML><HEAD></HEAD><BODY><P>Hi, Daniel,</P><P></P><P>The UM10912 description is correct.</P><P>Hope it can help you</P><P>BR</P><P>XiangJun Rong</P><P><span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"><img src="https://community.nxp.com/t5/image/serverpage/image-id/75169i8FBAAC44151D0922/image-size/large?v=v2&amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /></span></P></BODY></HTML> Thu, 21 Feb 2019 08:44:57 GMT https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-mismatch-between-SDK-and-UM10912-static-and-dynamic/m-p/880054#M35149 xiangjun_rong 2019-02-21T08:44:57Z https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-mismatch-between-SDK-and-UM10912-static-and-dynamic/m-p/880055#M35150 <HTML><HEAD></HEAD><BODY><P>Hi Rong</P><P>So how can I fit up to 256 MB into the dynamic memory sections without writing into the next section?</P><P>0xA000'0000 - 0xA7FF'FFFF allows a maximum of 128 MB NOT 256 MB.</P><P>I believe the User Manual is also wrong!</P><P>Dani</P></BODY></HTML> Thu, 21 Feb 2019 08:51:05 GMT https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-mismatch-between-SDK-and-UM10912-static-and-dynamic/m-p/880055#M35150 danielgull 2019-02-21T08:51:05Z https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-mismatch-between-SDK-and-UM10912-static-and-dynamic/m-p/880056#M35151 <HTML><HEAD></HEAD><BODY><P>Hi, Daniel,</P><P>For the SDRAM address map Table, I think the size 256MB is correct, but the address range is incorrect.</P><P>Pls download the an12026.pdf from the link:</P><P><A class="link-titled" href="https://www.nxp.com/docs/en/nxp/application-notes/AN12026.pdf" title="https://www.nxp.com/docs/en/nxp/application-notes/AN12026.pdf">https://www.nxp.com/docs/en/nxp/application-notes/AN12026.pdf</A>&nbsp;</P><P></P><P>it gives the chip select for both DRAM and SRAM.</P><P><span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"><img src="https://community.nxp.com/t5/image/serverpage/image-id/77132iDCBE791948D53E2F/image-size/large?v=v2&amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /></span></P><P></P><P>BR</P><P>XiangJun Rong</P></BODY></HTML> Fri, 22 Feb 2019 02:52:24 GMT https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-mismatch-between-SDK-and-UM10912-static-and-dynamic/m-p/880056#M35151 xiangjun_rong 2019-02-22T02:52:24Z https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-mismatch-between-SDK-and-UM10912-static-and-dynamic/m-p/880057#M35152 <HTML><HEAD></HEAD><BODY><P>Great information - thank you Rong - Wish you a great weekend. I should be able to work with this now.</P><P>Many thanks</P><P>Dani</P></BODY></HTML> Fri, 22 Feb 2019 05:48:06 GMT https://community.nxp.com/t5/LPC-Microcontrollers/LPC546xx-mismatch-between-SDK-and-UM10912-static-and-dynamic/m-p/880057#M35152 danielgull 2019-02-22T05:48:06Z