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    <title>topic Re: LPC4350 Simultaneous LPC_TIMER0 reads from M4 and M0 in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-Simultaneous-LPC-TIMER0-reads-from-M4-and-M0/m-p/870356#M34713</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;There shouldn't be a problem. Both cores are bust masters and can read at any point in time from peripheral resources. The one which reads first will get first.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What is always dangerous:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;while (x &amp;lt; 1000)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; x = read_timer(timer0);&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If you poll with full CPU speed on a register, even simultaneously with two different cores, then you might see weird system behavior.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Bernhard.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 11 Jan 2019 16:23:01 GMT</pubDate>
    <dc:creator>bernhardfink</dc:creator>
    <dc:date>2019-01-11T16:23:01Z</dc:date>
    <item>
      <title>LPC4350 Simultaneous LPC_TIMER0 reads from M4 and M0</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-Simultaneous-LPC-TIMER0-reads-from-M4-and-M0/m-p/870355#M34712</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Is there any problem with initializing LPC_TIMER0 on the M4 core and then calling Chip_TIMER_ReadCount(LPC_TIMER0) asynchronously on both the M4 and M0 cores to allow for synchronized timing functions between both cores? &amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks,&lt;/P&gt;&lt;P&gt;Greg Dunn&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 11 Jan 2019 16:08:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-Simultaneous-LPC-TIMER0-reads-from-M4-and-M0/m-p/870355#M34712</guid>
      <dc:creator>gregdunn</dc:creator>
      <dc:date>2019-01-11T16:08:24Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4350 Simultaneous LPC_TIMER0 reads from M4 and M0</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-Simultaneous-LPC-TIMER0-reads-from-M4-and-M0/m-p/870356#M34713</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;There shouldn't be a problem. Both cores are bust masters and can read at any point in time from peripheral resources. The one which reads first will get first.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;What is always dangerous:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;while (x &amp;lt; 1000)&lt;/P&gt;&lt;P&gt;{&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; x = read_timer(timer0);&lt;/P&gt;&lt;P&gt;}&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If you poll with full CPU speed on a register, even simultaneously with two different cores, then you might see weird system behavior.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Bernhard.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 11 Jan 2019 16:23:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-Simultaneous-LPC-TIMER0-reads-from-M4-and-M0/m-p/870356#M34713</guid>
      <dc:creator>bernhardfink</dc:creator>
      <dc:date>2019-01-11T16:23:01Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4350 Simultaneous LPC_TIMER0 reads from M4 and M0</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-Simultaneous-LPC-TIMER0-reads-from-M4-and-M0/m-p/870357#M34714</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thank you very much for the clarification!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Greg&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 11 Jan 2019 18:30:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-Simultaneous-LPC-TIMER0-reads-from-M4-and-M0/m-p/870357#M34714</guid>
      <dc:creator>gregdunn</dc:creator>
      <dc:date>2019-01-11T18:30:03Z</dc:date>
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