topic LPC51U68 I2S Spec in LPC Microcontrollers

LPC51U68 I2S Spec

ianbenton — Sun, 17 Feb 2019 13:39:56 GMT

There doesn't even seem to be a section for LPC51 yet, so I put it in here.

If I was to connect the device to a codec with several input and output channels, how many can it support?
Reading the manual, it seems to have two instances of an I2S interface, but each is capable of being and input OR an output but not both; so I'd need both of them to connect to a codec with both ADCs and DACs. Is that correct?

Most codecs seem to communicate using TDM with one time-slot per input/output. What is the maximum number of timeslots? It seems from the manual it is limited to 512 bits per sample in total, 256 left and 256 right, so 8 channels of 32 bits, perhaps?

Re: LPC51U68 I2S Spec

xiangjun_rong — Wed, 20 Feb 2019 03:17:46 GMT

Hi, Ian,

For the LPC51U68 processor, there are two independent instances of an I2S interface:

One instance:

PIO0_5: FC6_RXD_SDA_MOSI_DATA
PIO0_6: FC6_TXD_SCL_MISO_WS
PIO0_7: FC6_SCK

Another instance:

PIO1_12: FC7_SCK
PIO1_13: FC7_RXD_SDA_MOSI_DATA
PIO1_14: FC7_TXD_SCL_MISO_WS

Obviously, one instance can be connected to Codec ADC, another instance can be connected to Codec DAC. You can use I2S mode or TDM modes, for the I2S mode, there are two slots, for the TDM mode, the maximum frame length is 512 bits, in other words, the maximum slots is 512/32=16, so there are 8 channel pairs or 16 slots at most.

Hope it can help you

Xiangjun Rong

Re: LPC51U68 I2S Spec

ianbenton — Wed, 20 Feb 2019 10:39:30 GMT

Thanks.