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    <title>topic  SystemCoreClock does not compute. in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/SystemCoreClock-does-not-compute/m-p/520026#M3458</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by riscy00 on Mon Jan 06 00:08:34 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I could not get equation working correctly, I have XTAL = 8MHz and Target SystemCoreClock is 100Mhz (or close to this)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;After complies and run, the SystemCoreClock provide 100.480Mhz which is okay for this application, but when I check with equation in UM10360...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;#define PLL0CFG_Val&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x0004009C// This provide 100,480,000 Hz according to SystemCoreClock &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;#define CCLKCFG_Val&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000004// Divide Value for CPU Clock from PLL0 FCCO/4 = 100.48MHz as required.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;N +1= 5 and &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;M+1 = 9D = 157&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CCLKCFG=4 (post PPL divided = 4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;FIN = (Fcco*N)/2*M)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;100.480MHz * 4 = 401.92Mhz = Fcco, then Fin = (401.92Mhz * 5) /&amp;nbsp; (2 * 157) = 6.4MHz…..could not compute to 8Mhz!!. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Have I missed something?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 17:41:42 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T17:41:42Z</dc:date>
    <item>
      <title>SystemCoreClock does not compute.</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SystemCoreClock-does-not-compute/m-p/520026#M3458</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by riscy00 on Mon Jan 06 00:08:34 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I could not get equation working correctly, I have XTAL = 8MHz and Target SystemCoreClock is 100Mhz (or close to this)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;After complies and run, the SystemCoreClock provide 100.480Mhz which is okay for this application, but when I check with equation in UM10360...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;#define PLL0CFG_Val&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x0004009C// This provide 100,480,000 Hz according to SystemCoreClock &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;#define CCLKCFG_Val&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000004// Divide Value for CPU Clock from PLL0 FCCO/4 = 100.48MHz as required.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;N +1= 5 and &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;M+1 = 9D = 157&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CCLKCFG=4 (post PPL divided = 4)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;FIN = (Fcco*N)/2*M)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;100.480MHz * 4 = 401.92Mhz = Fcco, then Fin = (401.92Mhz * 5) /&amp;nbsp; (2 * 157) = 6.4MHz…..could not compute to 8Mhz!!. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Have I missed something?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:41:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SystemCoreClock-does-not-compute/m-p/520026#M3458</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:41:42Z</dc:date>
    </item>
    <item>
      <title>Re:  SystemCoreClock does not compute.</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SystemCoreClock-does-not-compute/m-p/520027#M3459</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by R2D2 on Mon Jan 06 09:32:22 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: riscy00&lt;/STRONG&gt;&lt;BR /&gt;Have I missed something?&lt;/SPAN&gt;&lt;HR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Yes&amp;nbsp; :) &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: riscy00&lt;/STRONG&gt;&lt;BR /&gt;#define CCLKCFG_Val&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0x00000004// Divide Value for CPU Clock from PLL0 FCCO/4 = 100.48MHz as required.&lt;BR /&gt;[color=#f00]CCLKCFG=4 (post PPL divided = 4)[/color]&lt;BR /&gt;&lt;/SPAN&gt;&lt;HR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If CCLKCFG_Val is 4, CCLKCFG is (CCLKCFG_Val +1) = 5 ...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Now you get the right results:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;FCCO = (2 × M × FIN) / N = 502,4 MHz&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;CPU CLOCK = 502,4 MHz / 5 = 100,48 MHz&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:41:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SystemCoreClock-does-not-compute/m-p/520027#M3459</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:41:43Z</dc:date>
    </item>
    <item>
      <title>Re:  SystemCoreClock does not compute.</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SystemCoreClock-does-not-compute/m-p/520028#M3460</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by riscy00 on Tue Jan 07 13:38:04 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I better get Darth Vader a P45 then, he the one giving me dark side of advice!&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks!&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:41:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SystemCoreClock-does-not-compute/m-p/520028#M3460</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:41:44Z</dc:date>
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