POWER_SetVoltageForFreq

shenchuanlin — Wed, 26 Dec 2018 04:03:13 GMT

how to use it?

Re: POWER_SetVoltageForFreq

soledad — Thu, 27 Dec 2018 19:14:59 GMT

Hi,

The power library provides API's to set the voltage for the desired operating frequency of the processor. The voltage regulation system can be in normal regulation mode or in low power regulation mode. The API POWER_SetVoltageForFreq() is used to set the voltage for normal regulation mode. Based on the frequency parameter the optimum voltage level is set. The API POWER_SetLowPowerVoltageForFreq() is used to set the low power voltage regulation mode and set the voltages for the desired frequency. For POWER_SetLowPowerVoltageForFreq() only two FRO frequencies are supported, 12MHz and 48MHz.

For example:

This is the 180M configuration code, just for your reference:

void BOARD_BootClock180M(void)
{
    /*!< Set up the clock sources */
    /*!< Set up FRO */
    POWER_DisablePD(kPDRUNCFG_PD_FRO_EN);                   /*!< Ensure FRO is on */
    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                  /*!< Switch to FRO 12MHz first to ensure we can change voltage without accidentally
                                                                being below the voltage for current speed */
    POWER_SetVoltageForFreq(180000000U);             /*!< Set voltage for the one of the fastest clock outputs: System clock output */
    CLOCK_SetFLASHAccessCyclesForFreq(180000000U);    /*!< Set FLASH wait states for core */

    /*!< Set up SYS PLL */
    const pll_setup_t pllSetup = {
        .syspllctrl = SYSCON_SYSPLLCTRL_SELI(32U) | SYSCON_SYSPLLCTRL_SELP(16U) | SYSCON_SYSPLLCTRL_SELR(0U),
        .syspllndec = (SYSCON_SYSPLLNDEC_NDEC(770U)),
        .syspllpdec = (SYSCON_SYSPLLPDEC_PDEC(98U)),
        .syspllmdec = (SYSCON_SYSPLLMDEC_MDEC(8191U)),
        .pllRate = 180000000U,
        .flags = PLL_SETUPFLAG_WAITLOCK | PLL_SETUPFLAG_POWERUP
    };

    CLOCK_AttachClk(kFRO12M_to_SYS_PLL);        /*!< Set sys pll clock source*/
    CLOCK_SetPLLFreq(&pllSetup);                     /*!< Configure PLL to the desired value */

/*!< Set up dividers */
CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false); /*!< Reset divider counter and set divider to value 1 */

    /*!< Set up clock selectors - Attach clocks to the peripheries */
    CLOCK_AttachClk(kSYS_PLL_to_MAIN_CLK);                  /*!< Switch MAIN_CLK to SYS_PLL */
    SYSCON->MAINCLKSELA = ((SYSCON->MAINCLKSELA & ~SYSCON_MAINCLKSELA_SEL_MASK) | SYSCON_MAINCLKSELA_SEL(3U)); /*!< Switch MAINCLKSELA to FRO_HF even it is not used for MAINCLKSELB */
    /* Set SystemCoreClock variable. */
    SystemCoreClock = 180000000;
}

Have a great day,
Sol

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Re: POWER_SetVoltageForFreq

shenchuanlin — Fri, 28 Dec 2018 01:00:55 GMT

thanks for your reply.

To LPC54608,In order to prevent interference, the unused pins are grounded and the output is low.the unused pins about 30~40.if i use the POWER_SetVoltageForFreq(180000000U); When burning the chip, the burnt pin(SWCLK /SWDIO ) is damaged.and if i cancel the POWER_SetVoltageForFreq(180000000U),it is ok now.so i do not konw how to use the function,and why the problem come from.

In addition，if unused pins is less,it also can normal burning chip.

the another question,ISP and SDRAM use the same pin,when we use the SDRAM,sometimes it can not normal soft reset，when we soft reset,such as watchdog、NVIC_SystemReset() and so on,we can not promise the SDRAM DATA PIN( also isp pin) in high,if the SDRAM ouput is low,and reset let the chip's isp pin low, then it constant into isp.At present, our practice is to ban ISP and implement ISP in our code.is there a better solution?

topic POWER_SetVoltageForFreq in LPC Microcontrollers

POWER_SetVoltageForFreq

Re: POWER_SetVoltageForFreq

Re: POWER_SetVoltageForFreq