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    <title>topic OM13092/J14 expansion header's SPI interface in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/OM13092-J14-expansion-header-s-SPI-interface/m-p/825283#M32992</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am confused about the documentation. It reads:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/78764i4DA2C3E04C0CB537/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;This does not mention JS34 or JS35 for FC3's MISO/MOSI However the schematic has this for J14:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_4.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/78712i95FBE34B924B7A4A/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_4.png" alt="pastedImage_4.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;and this for the MCU:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/78640i9285BC538BD74F01/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;And this:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_3.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/78685iA0B793D7546ABD60/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_3.png" alt="pastedImage_3.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;So by default the MCU FC3's MISO/MOSI pins are routed to the SDRAM correct? This means that I can not use J14 extension header FC3. But the documentation (table 14 just above) does not mention to modify JS34 and JS35. Further more the table "JS33, JS34,JS35,JS36"&amp;nbsp; reads to shunt JS34/JS35 in position 2-3 (default) when using 3.3V.&lt;/P&gt;&lt;P&gt;So does this means that the expansion port J14 can not be used?&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please advise&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 04 Dec 2018 01:09:24 GMT</pubDate>
    <dc:creator>belmontbob59</dc:creator>
    <dc:date>2018-12-04T01:09:24Z</dc:date>
    <item>
      <title>OM13092/J14 expansion header's SPI interface</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/OM13092-J14-expansion-header-s-SPI-interface/m-p/825283#M32992</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I am confused about the documentation. It reads:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/78764i4DA2C3E04C0CB537/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;This does not mention JS34 or JS35 for FC3's MISO/MOSI However the schematic has this for J14:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_4.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/78712i95FBE34B924B7A4A/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_4.png" alt="pastedImage_4.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;and this for the MCU:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/78640i9285BC538BD74F01/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;And this:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_3.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/78685iA0B793D7546ABD60/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_3.png" alt="pastedImage_3.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;So by default the MCU FC3's MISO/MOSI pins are routed to the SDRAM correct? This means that I can not use J14 extension header FC3. But the documentation (table 14 just above) does not mention to modify JS34 and JS35. Further more the table "JS33, JS34,JS35,JS36"&amp;nbsp; reads to shunt JS34/JS35 in position 2-3 (default) when using 3.3V.&lt;/P&gt;&lt;P&gt;So does this means that the expansion port J14 can not be used?&amp;nbsp;&lt;/P&gt;&lt;P&gt;Please advise&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 04 Dec 2018 01:09:24 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/OM13092-J14-expansion-header-s-SPI-interface/m-p/825283#M32992</guid>
      <dc:creator>belmontbob59</dc:creator>
      <dc:date>2018-12-04T01:09:24Z</dc:date>
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